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參數(shù)資料
| 型號： | LTC1668CG#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT 50MSPS 28-SSOP |
| 標準包裝： | 47 |
| 設置時間： | 20ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 180mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 50M |
| 產品目錄頁面： | 1352 (CN2011-ZH PDF) |
| 配用： | DC245A-A-ND - BOARD EVAL LTC1668 |
12
LTC1666/LTC1667/LTC1668
Adjusting the Full-Scale Output
In Figure 2, a serial interfaced DAC is used to set IOUTFS.
The LTC1661 is a dual 10-bit VOUT DAC with a buffered
voltage output that swings from 0V to VREF.
DAC Transfer Function
The LTC1666/LTC1667/LTC1668 use straight binary digital
coding. The complementary current outputs, IOUTA andIOUT
B, sink current from 0 to IOUTFS. For IOUTFS = 10mA (nomi-
nal), IOUT A swings from 0mA when all bits are low (e.g.,
Code = 0) to 10mA when all bits are high (e.g., Code = 65535
for LTC1668) (decimal representation). IOUT B is comple-
mentary to IOUTA. IOUTA and IOUTB are given by the following
formulas:
LTC1666:
IOUT A = IOUTFS (DAC Code/4096)
(2)
IOUT B = IOUTFS (4095 – DAC Code)/4096
(3)
LTC1667:
IOUT A = IOUTFS (DAC Code/16384)
(4)
IOUT B = IOUTFS (16383 – DAC Code)/16384
(5)
LTC1668:
IOUT A = IOUTFS (DAC Code/65536)
(6)
IOUT B = IOUTFS (65535 – DAC Code)/65536
(7)
In typical applications, the LTC1666/LTC1667/LTC1668
differential output currents either drive a resistive load
directly or drive an equivalent resistive load through a
transformer, or as the feedback resistor of an I-to-V
converter. The voltage outputs generated by the IOUT A and
IOUT B output currents are then:
Figure 2. Adjusting the Full-Scale Current of
the LTC1666/LTC1667/LTC1668 with a DAC
APPLICATIO S I FOR ATIO
WU
UU
VOUT A = IOUT A RLOAD
(8)
VOUT B = IOUT B RLOAD
(9)
The differential voltage is:
VDIFF = VOUT A – VOUT B
(10)
= (IOUT A – IOUT B) (RLOAD)
Substituting the values found earlier for IOUT A, IOUT B and
IOUTFS (LTC1668):
VDIFF = {2 DAC Code – 65535)/65536} 8
(RLOAD/RSET) (VREF)
(11)
From these equations some of the advantages of differen-
tial mode operation can be seen. First, any common mode
noise or error on IOUTA and IOUTB is cancelled. Second, the
signal power is twice as large as in the single-ended case.
Third, any errors and noise that multiply times IOUT A and
IOUT B, such as reference or IOUTFS noise, cancel near
midscale, where AC signal waveforms tend to spend the
most time. Fourth, this transfer function is bipolar; e.g. the
output swings positive and negative around a zero output
at mid-scale input, which is more convenient for AC
applications.
Note that the term (RLOAD/RSET) appears in both the
differential and single-ended transfer functions. This means
that the Gain Error of the DAC depends on the ratio of
RLOAD to RSET, and the Gain Error tempco is affected by the
temperature tracking of RLOAD with RSET. Note also that
the absolute tempco of RLOAD is very critical for DC
nonlinearity. As the DAC output changes from 0mA to
10mA the RLOAD resistor will heat up slightly, and even a
very low tempco can produce enough INL bowing to be
significant at the 16-bit level. This effect disappears with
medium to high frequency AC signals due to the slow
thermal time constant of the load resistor.
Analog Outputs
The LTC1666/LTC1667/LTC1668 have two complemen-
tary current outputs, IOUT A and IOUT B (see DAC Transfer
Function). The output impedance of IOUT A and IOUT B
(RIOUT A and RIOUT B) is typically 1.1k to LADCOM. (See
Figure 3.)
+
–
IREFIN
2.5V
REFERENCE
RSET
1.9k
REF
0.1
F
1/2 LTC1661
5V
1666/7/8 F03
LTC1666/
LTC1667/
LTC1668
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| LTC1668IGPBF | 制造商:Linear Technology 功能描述:DAC 16-Bit 50Msps Spectral Purity SSOP28 |
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