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參數(shù)資料
| 型號： | LTC1690IS8#TR |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX DIFF FAILSAFE LP 8SOIC |
| 標準包裝： | 2,500 |
| 類型： | 驅(qū)動器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | RS422，RS485 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
8
LTC1690
3
1
5
6
D
120
2
1
8
7
R
DRIVER
LTC1690
5V
LTC1690
RECEIVER
120
SHIELD
2
4
7
8
R
3
4
6
5
D
RECEIVER
DRIVER
1690 F06
SHIELD
0.01
F
5V
0.01
F
Figure 6. Typical Application
APPLICATIONS INFORMATION
WU
U
A typical application is shown in Figure 6. Two twisted pair
wires connect two driver/receiver pairs for full duplex data
transmission. Note that the driver and receiver outputs are
always enabled. If the outputs must be disabled, use the
LTC491. There are no restrictions on where the chips are
connected, and it isn’t necessary to have the chips con-
nected to the ends of the wire. However, the wires must be
terminated at the ends with a resistor equal to their
characteristic impedance, typically 120
. Because only
one driver can be connected on the bus, the cable need
only be terminated at the receiving end. The optional
shields around the twisted pair are connected to GND at
one end and help reduce unwanted noise.
The LTC1690 can be used as a line repeater as shown in
Figure 7. If the cable is longer that 4000 feet, the LTC1690
is inserted in the middle of the cable with the receiver
output connected back to the driver input.
Receiver Fail-Safe
Some encoding schemes require that the output of the
receiver maintains a known state (usually a logic 1) when
data transmission ends and all drivers on the line are
forced into three-state. The receiver of the LTC1690 has a
fail-safe feature which guarantees the output to be in a
logic 1 state when the receiver inputs are left floating or
shorted together. This is achieved without external com-
ponents by designing the trip-point of the LTC1690 to be
within – 200mV to –10mV. If the receiver output must be
a logic 0 instead of a logic 1, external components are
required.
The LTC1690 fail-safe receiver is designed to reject fast
–7V to 12V common mode steps at its inputs. The slew
rate that the receiver will reject is typically 400V/
s, but
–7V to 12V steps in 10ns can be tolerated if the frequency
of the common mode step is moderate (<600kHz).
Driver-Receiver Crosstalk
The driver outputs generate fast rise and fall times. If the
LTC1690 receiver inputs are not terminated and floating,
switching noise from the LTC1690 driver can couple into
the receiver inputs and cause the receiver output to glitch.
This can be prevented by ensuring that the receiver inputs
are terminated with a 100
or 120 resistor, depending
on the type of cable used. A cable capacitance that is
greater than 10pF (
≈1ft of cable) also prevents glitches if
no termination is present. The receiver inputs should not
be driven typically above 8MHz to prevent glitches.
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| LTC1693-1CS8#TR | 功能描述:IC DRVR MOSF DUAL N-CH HS 8SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - MOSFET，電橋驅(qū)動器 - 外部開關(guān) 系列:- 標準包裝:5 系列:- 配置:低端 輸入類型:非反相 延遲時間:600ns 電流 - 峰:12A 配置數(shù):1 輸出數(shù):1 高端電壓 - 最大（自引導(dǎo)啟動）:- 電源電壓:14.2 V ~ 15.8 V 工作溫度:-20°C ~ 60°C 安裝類型:通孔 封裝/外殼:21-SIP 模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 配用:BG2A-NF-ND - KIT DEV BOARD FOR IGBT 其它名稱:835-1063 |
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