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參數(shù)資料
| 型號(hào)： | LTC1707IS8 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | High Efficiency Monolithic Synchronous Step-Down Switching Regulator |
| 中文描述： | 1.5 A SWITCHING REGULATOR, 385 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | 0.150 INCH, PLASTIC, SO-8 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大小： | 213K |
| 代理商： | LTC1707IS8 |
6
LTC1707
Main Control Loop
The LTC1707 uses a constant frequency, current mode
step-down architecture. Both the main (P-channel
MOSFET) and synchronous (N-channel MOSFET) switches
are internal. During normal operation, the internal top
power MOSFET is turned on each cycle when the oscillator
sets the RS latch, and turned off when the current com-
parator, I
COMP
, resets the RS latch. The peak inductor
current at which I
COMP
resets the RS latch is controlled by
the voltage on the I
TH
pin, which is the output of error
amplifier EA. The V
FB
pin, described in the Pin Functions
section, allows EA to receive an output feedback voltage
from an external resistive divider. When the load current
increases, it causes a slight decrease in the feedback
voltage relative to the 0.8V reference, which, in turn,
causes the I
TH
voltage to increase until the average induc-
tor current matches the new load current. While the top
MOSFET is off, the bottom MOSFET is turned on until
either the inductor current starts to reverse as indicated by
the current reversal comparator I
RCMP
, or the beginning of
the next cycle.
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 2.25
μ
A
current source to charge soft-start capacitor C
SS
. When
C
SS
reaches 0.7V, the main control loop is enabled with the
I
TH
voltage clamped at approximately 5% of its maximum
value. As C
SS
continues to charge, I
TH
is gradually
released, allowing normal operation to resume.
Comparator OVDET guards against transient overshoots
>7.5% by turning the main switch off and keeping it off
until the fault is removed.
Burst Mode Operation
The LTC1707 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand. To enable Burst Mode operation, simply
allow the SYNC/MODE pin to float or connect it to a logic
high. To disable Burst Mode operation and enable pulse
skipping mode, connect the SYNC/MODE pin to GND. In
this mode, efficiency is lower at light loads, but becomes
comparable to Burst Mode operation when the output load
exceeds 30mA.
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 200mA,
even though the voltage at the I
TH
pin indicates a lower
value. The voltage at the I
TH
pin drops when the inductor’s
average current is greater than the load requirement. As
the I
TH
voltage drops below 0.12V, the BURST comparator
trips, causing the internal sleep line to go high and forcing
off both internal power MOSFETs.
In sleep mode, both power MOSFETs are held off and the
internal circuitry is partially turned off, reducing the quies-
cent current to 200
μ
A. The load current is now being
supplied from the output capacitor. When the output
voltage drops, causing I
TH
to rise above 0.22V, the top
MOSFET is again turned on and this process repeats.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 35kHz, 1/10 the nominal
frequency. This frequency foldback ensures that the
inductor current has more time to decay, thereby prevent-
ing runaway. The oscillator’s frequency will progressively
increase to 350kHz (or the synchronized frequency) when
V
FB
rises above 0.3V.
Frequency Synchronization
The LTC1707 can be synchronized with an external
TTL/CMOS compatible clock signal with an amplitude of at
least 2V
P-P
. The frequency range of this signal must be
from 385kHz to 550kHz. Do not ttempt to synchronize the
LTC1707 below 385kHz as this may cause abnormal
operation and an undesired frequency spectrum. The top
MOSFET turn-on follows the rising edge of the external
source.
When the LTC1707 is synchronized to an external source,
the LTC1707 operates in PWM pulse skipping mode. In
this mode, when the output load is very low, current
comparator I
COMP
remains tripped for more than one cycle
and forces the main switch to stay off for the same number
of cycles. Increasing the output load slightly allows con-
stant frequency PWM operation to resume. This mode
exhibits low output ripple as well as low audio noise and
reduced RF interference while providing reasonable low
current efficiency.
(Refer to Functional Diagram)
OPERATIOU
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