參數(shù)資料
型號(hào)： LTC1709
廠商： Linear Technology Corporation
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
中文描述： 抗輻射高效，5安培開關(guān)穩(wěn)壓器
文件頁(yè)數(shù)： 25/28頁(yè)
文件大?。?/td> 319K
代理商： LTC1709
25
LTC1709-7
APPLICATIU
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1709-7. These items are also illustrated graphically in
the layout diagram of Figure12. Check the following in
your layout:
1) Are the signal and power grounds segregated The
LTC1709-7 signal ground pin should return to the (–) plate
of C
OUT
separately. The power ground returns to the
sources of the bottom N-channel MOSFETs, anodes of the
Schottky diodes, and (–) plates of C
IN
, which should have
as short lead lengths as possible.
2) Does the LTC1709-7 V
OS+
pin connect to the point of
load Does the LTC1709-7 V
OS–
pin connect to the load
return
3) Are the SENSE
–
and SENSE
+
leads routed together with
minimum PC trace spacing The filter capacitors between
SENSE
+
and SENSE
–
pin pairs should be as close as
possible to the LTC1709-7. Ensure accurate current sens-
ing with Kelvin connections at the current sense resistor.
4) Does the (+) plate of C
IN
connect to the drains of the
topside MOSFETs as closely as possible This capacitor
provides the AC current to the MOSFETs. Keep the input
current path formed by the input capacitor, top and bottom
MOSFETs, and the Schottky diode on the same side of the
PC board in a tight loop to minimize conducted and
radiated EMI.
5) Is the INTV
CC
1
μ
F ceramic decoupling capacitor con-
nected closely between
INTV
CC
and the power ground pin
This capacitor carries the MOSFET driver peak currents. A
small value is recommended to allow placement immedi-
ately adjacent to the IC.
6) Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
should be placed at the furthest point from the
LTC1709-7.
7) Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
The diagram in Figure 10 illustrates all branch currents in
a 2-phase switching regulator. It becomes very clear after
W
U
U
studying the current waveforms why it is critical to keep
the high-switching-current paths to a small physical size.
High electric and magnetic fields will radiate from these
“l(fā)oops” just as radio stations transmit signals. The output
capacitor ground should return to the negative terminal of
the input capacitor and not share a common ground path
with any switched current paths. The left half of the circuit
gives rise to the “noise” generated by a switching regula-
tor. The ground terminations of the sychronous MOSFETs
and Schottky diodes should return to the negative plate(s)
of the input capacitor(s) with a short isolated PC trace
since very high switched currents are present. A separate
isolated path from the negative plate(s) of the input
capacitor(s) should be used to tie in the IC power ground
pin (PGND) and the signal ground pin (SGND). This
technique keeps inherent signals generated by high cur-
rent pulses from taking alternate current paths that have
finite impedances during the total period of the switching
regulator. External OPTI-LOOP compensation allows over-
compensation for PC layouts which are not optimized but
this is not the recommended design procedure.
Simplified Visual Explanation of How a 2-Phase
Controller Reduces Both Input and Output RMS Ripple
Current
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output
capacitors. The RMS input ripple current is divided by, and
the effective ripple frequency is multiplied up by the
number of phases used (assuming that the input voltage
is greater than the number of phases used times the output
voltage). The output ripple amplitude is also reduced by,
and the effective ripple frequency is increased by the
number of phases used. Figure 11 graphically illustrates
the principle.
The worst-case RMS ripple current for a single stage
design peaks at an input voltage of twice the output
voltage. The worst-case RMS ripple current for a two stage
design results in peak outputs of 1/4 and 3/4 of input
voltage. When the RMS current is calculated, higher
effective duty factor results and the peak current levels are
divided as long as the currents in each stage are balanced.
Refer to Application Note 19 for a detailed description of
相關(guān)PDF資料
PDF描述
LTC1709EG-8 RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
LTC1709EG-9 RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
LTC1709-8 CHOKE COIL 2.7UH 950MA SMD
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LTC1709EG 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,500 系列:PowerWise® PWM 型:控制器 輸出數(shù):1 頻率 - 最大:1MHz 占空比:95% 電源電壓:2.8 V ~ 5.5 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 125°C 封裝/外殼:6-WDFN 裸露焊盤 包裝:帶卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名稱:LM1771SSDX
LTC1709EG#PBF 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR)
LTC1709EG#TR 功能描述:IC REG CTRLR BUCK PWM CM 36-SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,500 系列:PowerWise® PWM 型:控制器 輸出數(shù):1 頻率 - 最大:1MHz 占空比:95% 電源電壓:2.8 V ~ 5.5 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 125°C 封裝/外殼:6-WDFN 裸露焊盤 包裝:帶卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名稱:LM1771SSDX
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LTC1709EG7 制造商:Linear Technology 功能描述:
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