參數(shù)資料
型號(hào)： LTC1735C-1
廠(chǎng)商： Linear Technology Corporation
元件分類(lèi)： 基準(zhǔn)電壓源/電流源
英文描述： RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
中文描述： 抗輻射高效，5安培開(kāi)關(guān)穩(wěn)壓器
文件頁(yè)數(shù)： 21/32頁(yè)
文件大?。?/td> 373K
代理商： LTC1735C-1
21
LTC1735
The I
TH
series R
C
–C
C
filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and the
particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
feedback factor gain and phase. An output current pulse of
20% to 100% of full load current having a rise time of 1
μ
s
to 10
μ
s will produce output voltage and I
TH
pin waveforms
that will give a sense of the overall loop stability without
breaking the feedback loop. The initial output voltage step
may not be within the bandwidth of the feedback loop, so
the standard second-order overshoot/DC ratio cannot be
used to determine phase margin. The gain of the loop will
be increased by increasing R
C
and the bandwidth of the
loop will be increased by decreasing C
C
. If R
C
is increased
by the same factor that C
C
is decreased, the zero frequency
will be kept the same, thereby keeping the phase the same
in the most critical frequency range of the feedback loop.
The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance. For a detailed
explanation of optimizing the compensation components,
including a review of control loop theory, refer to Applica-
tion Note 76.
A second, more severe transient is caused by switching in
loads with large (>1
μ
F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
C
LOAD
to C
OUT
is greater than1:50, the switch rise time
should be controlled so that the load rise time is limited to
approximately (25)(C
LOAD
). Thus a 10
μ
F capacitor would
require a 250
μ
s rise time, limiting the charging current to
about 200mA.
Improve Transient Response and Reduce Output
Capacitance with Active Voltage Positioning
Fast load transient response, limited board space and low
cost are requirements of microprocessor power supplies.
APPLICATIU
W
U
U
Active voltage positioning improves transient response
and reduces the output capacitance required to power a
microprocessor where a typical load step can be from 0.2A
to 15A in 100ns or 15A to 0.2A in 100ns. The voltage at the
microprocessor must be held to about
±
0.1V of nominal
in spite of these load current steps. Since the control loop
cannot respond this fast, the output capacitors must
supply the load current until the control loop can respond.
Capacitor ESR and ESL primarily determine the amount of
droop or overshoot in the output voltage. Normally, sev-
eral capacitors in parallel are required to meet micropro-
cessor transient requirements.
Active voltage positioning is a form of deregulation. It sets
the output voltage high for light loads and low for heavy
loads. When load current suddenly increases, the output
voltage starts from a level higher than nominal so the
output voltage can droop more and stay within the speci-
fied voltage range. When load current suddenly decreases
the output voltage starts at a level lower than nominal so
the output voltage can have more overshoot and stay
within the specified voltage range. Less output capaci-
tance is required when voltage positioning is used be-
cause more voltage variation is allowed on the output
capacitors.
Active voltage positioning can be implemented using the
OPTI-LOOP architecture of the LTC1735 and two resistors
connected to the I
TH
pin. An input voltage offset is intro-
duced when the error amplifier has to drive a resistive load.
This offset is limited to
±
30mV at the input of the error
amplifier. The resulting change in output voltage is the
product of input offset and the feedback voltage divider
ratio.
Figure 8 shows a CPU-core-voltage regulator with active
voltage positioning. Resistors R1 and R4 force the input
voltage offset that adjusts the output voltage according to
the load current level. To select values for R1 and R4, first
determine the amount of output deregulation allowed. The
actual specification for a typical microprocessor allows
the output to vary
±
0.112V. The LTC1735 reference accu-
racy is
±
1%. Using 1% tolerance resistors, the total
feedback divider accuracy is about 1% because both
feedback resistors are close to the same value. The result-
ing setpoint accuracy is
±
2% so the output transient
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