OVDD (Pin 19): Positive Supply for the Output Logic. Can be 2.7V" />
參數(shù)資料
型號: LTC1740CG
廠商: Linear Technology
文件頁數(shù): 14/16頁
文件大小: 0K
描述: IC ADC 14BIT 6MSPS 36SSOP
標(biāo)準(zhǔn)包裝: 37
位數(shù): 14
采樣率(每秒): 6M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 300mW
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 36-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 36-SSOP
包裝: 管件
輸入數(shù)目和類型: 2 個(gè)單端,雙極;1 個(gè)差分,雙極
產(chǎn)品目錄頁面: 1349 (CN2011-ZH PDF)
7
LTC1740
1740f
OVDD (Pin 19): Positive Supply for the Output Logic. Can
be 2.7V to 5.25V. Bypass to GND with a 1
F to 10F
ceramic capacitor.
BUSY (Pin 27): BUSY is low when a conversion is in
progress. When a conversion is finished and the ADC is
acquiring the input signal, BUSY is high. Either the falling
edge of BUSY or the rising edge of CLK can be used to
latch the output data.
VSS (Pins 29, 30): Negative Supply. Can be – 5V or 0V. If
VSS is not shorted to GND, bypass to GND with a 1F
ceramic capacitor.
VDD (Pins 32, 33): Analog 5V Supply. Bypass to GND with
a 1
F to 10F ceramic capacitor (do not share a capacitor
with Pins 8, 9).
CLK (Pin 35): Conversion Start Signal. This active high
signal starts a conversion on its rising edge.
OF (Pin 36): Overflow Output. This signal is high when the
digital output is 01 1111 1111 1111 or 10 0000 0000 0000.
+AIN (Pin 1): Positive Analog Input.
–AIN (Pin 2): Negative Analog Input.
VCM (Pin 3): 2.5V Reference Output. Optional input com-
mon mode for single supply operation. Bypass to GND
with a 1
F to 10F ceramic capacitor.
SENSE (Pin 4): Reference Programming Pin. Ground
selects VREF = 4.5V. Short to VREF for VREF = 2.25V.
Connect SENSE to VDD to drive VREF with an external
reference. Connect SENSE directly to VDD, VREF or GND.
Do not drive SENSE with a logic signal.
VREF (Pin 5): DAC Reference. Bypass to GND with a 1F to
10
F ceramic capacitor.
GND (Pins 6, 7, 10, 31, 34): Analog Power Ground.
VDD (Pins 8, 9): Analog 5V Supply. Bypass to GND with a
1
F to 10F ceramic capacitor. (Do not share a capacitor
with Pins 32 and 33.)
OGND (Pins 11, 28): Output Logic Ground. Connect to
GND.
D13 to D0 (Pins 12 to 18, 20 to 26): Data Outputs. The
output format is two’s complement.
PIN FUNCTIONS
UU
U
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