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參數(shù)資料
| 型號： | LTC1775CS |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Quadruple 2-Input Positive-NAND Gate 14-SOIC -40 to 85 |
| 中文描述： | 2 A SWITCHING CONTROLLER, 165 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SO-16 |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 289K |
| 代理商： | LTC1775CS |
10
LTC1775
paid to the resulting thermal issues. Under DC conditions,
the maximum power that can be dissipated by a MOSFET
switch limits the current through it:
I
P
R
T
T
DS MAX
(
DS ON
(
J MAX
(
A
JA DS ON
TJ MAX
(
)
)
)
(
)
)
–
ρ
=
=
θ
For example, the SUD50N03-10 with T
J(MAX)
= 175
°
C,
T
A
=70
°
,
θ
JA
= 30
°
C/W, R
DS(ON)
= 0.019
,
ρ
TJ(MAX)
= 1.8
can operate with a maximum DC current of 10A. In a
switching application, the actual power dissipation is
increased by the transition losses and is reduced by the
switch duty cycle. When the LTC1775 is operating in
continuous mode, the duty cycles for the MOSFETs are:
TopDutyCycle
V
V
BottomDutyCycle
V
V
V
OUT
IN
IN
OUT
IN
=
=
–
The MOSFET power dissipations at maximum output
current are:
P
V
V
I
R
k V
I
C
f
P
V
V
V
I
R
TOP
OUT
IN
O MAX
(
T TOP
(
DS ON
(
IN
O MAX
(
RSS
BOT
IN
OUT
IN
O MAX
(
T BOT
(
DS ON
(
=
+
=
(
)(
)(
)
)(
)(
)( )
–
(
)(
)(
)
)
)
)
)
)
)
)
2
2
2
ρ
ρ
Both MOSFETs have I
2
R losses and the P
TOP
equation
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7 can be
used to estimate the amount of transition loss. The bottom
MOSFET losses are greatest at high input voltage or during
a short circuit when the duty cycle is nearly 100%. The
temperature rise of the MOSFETs depends on the effective
thermal resistance
θ
JA
of the heat sink used in the applica-
tion. Check the temperature of the MOSFET when testing
applications and use appropriate heat sinking such as
board power planes to spread the heat.
Figure 4. SYNC Clock Waveform
Operating Frequency and Synchronization
The choice of operating frequency and inductor value is a
trade-off between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET switching losses, both gate charge loss and
transition loss. However, lower frequency operation
requires more inductance for a given amount of ripple
current.
The internal oscillator runs at a nominal 150kHz frequency
when the SYNC pin is left open or connected to ground.
Pulling the SYNC pin above 1.2V will increase the fre-
quency by 50%. The oscillator will injection lock to a clock
signal applied to the SYNC pin with a frequency between
165kHz and 200kHz. The clock high level must exceed
1.2V for at least 1
μ
s and no longer than 4
μ
s as shown in
Figure 4. The top MOSFET turn-on will synchronize with
the rising edge of the clock.
0
1775 F04
7V
1
μ
s < t
ON
< 4
μ
s
5
μ
s < t < 6
μ
s
1.2V
Inductor Value Selection
Given the desired input and output voltages, the inductor
value and operating frequency directly determine the
ripple current:
I
V
f L
( )( )
V
V
L
OUT
OUT
IN
=
–
1
Lower ripple current reduces losses in the inductor, ESR
losses in the output capacitors and output voltage ripple.
Thus, highest efficiency operation is obtained at low
frequency with small ripple current. To achieve this, how-
ever, requires a large inductor.
APPLICATIOU
W
U
U
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC1775I | Quadruple 2-Input Positive-NAND Gate 14-SOIC -40 to 85 |
| LTC1775IS | Quadruple 2-Input Positive-NAND Gate 14-SOIC -40 to 85 |
| LTC1775 | High Power Current Mode Synchronous Step-Down Switching Regulator(大功率，同步電流模式步降開關(guān)穩(wěn)壓器) |
| LTC1778-1 | Wide Operating Range, No RSENSE Step-Down Controller |
| LTC1778 | Wide Operating Range, No RSENSE Step-Down Controller |
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