參數(shù)資料
型號(hào): LTC1867LAIGN#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 4/16頁(yè)
文件大小: 0K
描述: IC ADC 16BIT 8CH 175KSPS 16SSOP
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 175k
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.7mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極;4 個(gè)差分,單極;4 個(gè)差分,雙極
配用: DC873A-ND - BOARD SAR ADC LTC1867L
DC806A-ND - BOARD SAR ADC LTC1867
LTC1863L/LTC1867L
12
1863l7lfc
Total Harmonic Distortion
Total Harmonic Distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal to the fundamental
itself. The out-of-band harmonics alias into the frequency
band between DC and half the sampling frequency. THD
is expressed as:
THD
VVV
V
N
=
++
+
20
2
3
2
4
22
1
log
...
where V1 is the RMS amplitude of the fundamental
frequency and V2 through VN are the amplitudes of the
second through Nth harmonics.
Internal Reference
The LTC1863L and LTC1867L have an on-chip, temperature
compensated, curvature corrected, bandgap reference that
is factory trimmed to 1.25V. It is internally connected to
a reference amplier and is available at VREF (Pin 10). A
3k resistor is in series with the output so that it can be
easily overdriven by an external reference if better drift
and/or accuracy are required as shown in Figure 4. The
reference amplier gains the VREF voltage by 2x to 2.5V at
REFCOMP (Pin 9). This reference amplier compensation
APPLICATIONS INFORMATION
pin, REFCOMP, must be bypassed with a 10μF ceramic or
tantalum in parallel with a 0.1μF ceramic for best noise
performance.
Digital Interface
The LTC1863L and LTC1867L have a very simple digital
interface that is enabled by the control input, CS/CONV.
A logic rising edge applied to the CS/CONV input will initi-
ate a conversion. After the conversion, taking CS/CONV
low will enable the serial port and the ADC will present
digital data in two’s complement format in bipolar mode
or straight binary format in unipolar mode, through the
SCK/SDO serial port.
Internal Clock
The internal clock is factory trimmed to achieve a typical
conversion time of 3.2μs and a maximum conversion time,
3.7μs, over the full operating temperature range. The typi-
cal acquisition time is 1.68μs, and a throughput sampling
rate of 175ksps is tested and guaranteed.
Automatic Nap Mode
The LTC1863L and LTC1867L go into automatic nap
mode when CS/CONV is held high after the conversion
is complete. With a typical operating current of 750μA
and automatic 170μA nap mode between conversions, the
power dissipation drops with reduced sample rate. The
ADC only keeps the VREF and REFCOMP voltages active
when the part is in the automatic nap mode. The slower
the sample rate allows the power dissipation to be lower
(see Figure 5).
Figure 4b. Using the LT1790A-1.25 as an External Reference
Figure 4a. LTC1867L Reference Circuit
Figure 5. Supply Current vs fSAMPLE
R2
R3
REFERENCE
AMP
10μF
2.2μF
REFCOMP
GND
VREF
R1
3k
10
9
15
1.25V
2.5V
LTC1863L/LTC1867L
1863L7L F04a
BANDGAP
REFERENCE
10
0.1μF
10μF
1863L7L F04b
LT1790A-1.25
VOUT
VIN
3V
VREF
LTC1863L/
LTC1867L
GND
REFCOMP
15
9
+
2.2μF
fSAMPLE (ksps)
1
500
SUPPLY
CURRENT
(μA)
600
700
800
10
100
1000
1863L7L G09
400
300
200
100
VDD = 2.7V
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