參數(shù)資料
型號(hào): LTC1966IMS8
廠商: LINEAR TECHNOLOGY CORP
元件分類: 模擬專用變換器
英文描述: Precision Micropower, SIGMA RMS-to-DC Converter
中文描述: RMS TO DC CONVERTER, PDSO8
封裝: PLASTIC, MSOP-8
文件頁(yè)數(shù): 4/32頁(yè)
文件大小: 444K
代理商: LTC1966IMS8
4
LTC1966
sn1966 1966fas
ELECTRICAL CHARACTERISTICS
Note 11:
High speed automatic testing cannot be performed with 60Hz
inputs. The LTC1966 is 100% tested with DC stimulus. Correlation tests
have shown that the performance limits above can be guaranteed with the
additional testing being performed to verify proper operation of all internal
circuitry.
Note 12:
The LTC1966 is a switched capacitor device and the input/output
impedance is an average impedance over many clock cycles. The input
impedance will not necessarily lead to an attenuation of the input signal
measured. Refer to the Applications Information section titled “Input
Impedance” for more information.
Note 13:
The common mode rejection ratios of the LTC1966 are measured
with DC inputs from 50mV to 350mV. The input CMRR is defined as the
change in V
IOS
measured between input levels of V
SS
to V
SS
+ 350mV and
input levels of V
DD
– 350mV to V
DD
divided by V
DD
– V
SS
– 350mV. The
output CMRR is defined as the change in V
OOS
measured with OUT RTN =
V
SS
and OUT RTN = V
DD
– 350mV divided by V
DD
– V
SS
– 350mV.
TYPICAL PERFOR U
Note 14:
The LTC1966 input and output voltage swings are limited by
internal clipping. However, its
Σ
topology is relatively tolerant of
momentary internal clipping. The input clipping is tested with a crest
factor of 2, while the output clipping is tested with a DC input.
Note 15:
The LTC1966 exploits oversampling and noise shaping to reduce
the quantization noise of internal 1-bit analog-to-digital conversions. At
higher input frequencies, increasingly large portions of this noise are
aliased down to DC. Because the noise is shifted in frequency, it becomes
a low frequency rumble and is only filtered at the expense of increasingly
long settling times. The LTC1966 is inherently wideband, but the output
accuracy is degraded by this aliased noise. These specifications apply with
C
AVE
= 10
μ
F and constitute a 3-sigma variation of the output rumble.
Note 16:
The LTC1966 can operate down to 2.7V single supply but cannot
operate at
±
2.7V. This additional constraint on V
SS
can be expressed
mathematically as –3 (V
DD
– 2.7V)
V
SS
Ground.
Gain and Offset
vs Output Common Mode
Gain and Offset
vs Output Common Mode
OUTPUT COMMON MODE (V)
0
–0.5
G
O
–0.4
–0.2
–0.1
0
0.5
0.2
1.0
2.0 2.5
5.0
4.5
1966 G05
–0.3
0.3
0.4
0.1
–0.5
–0.4
–0.2
–0.1
0
0.5
0.2
–0.3
0.3
0.4
0.1
0.5
1.5
3.0 3.5 4.0
V
DD
= 5V
V
SS
= GND
V
IOS
V
OOS
GAIN ERROR
OUTPUT COMMON MODE (V)
–5
–0.5
G
O
–0.4
–0.2
–0.1
0
0.5
0.2
–3
–1
0
5
4
1966 G06
–0.3
0.3
0.4
0.1
–0.5
–0.4
–0.2
–0.1
0
0.5
0.2
–0.3
0.3
0.4
0.1
–4
–2
1
2
3
V
DD
= 5V
V
SS
= –5V
V
IOS
V
OOS
GAIN ERROR
Gain and Offset
vs Input Common Mode
Gain and Offset
vs Input Common Mode
INPUT COMMON MODE (V)
0
–0.5
G
O
–0.4
–0.2
–0.1
0
0.5
0.2
1.0
2.0 2.5
5.0
4.5
1966 G02
–0.3
0.3
0.4
0.1
–0.5
–0.4
–0.2
–0.1
0
0.5
0.2
–0.3
0.3
0.4
0.1
0.5
1.5
3.0 3.5 4.0
V
DD
= 5V
V
SS
= GND
V
IOS
V
OOS
GAIN ERROR
INPUT COMMON MODE (V)
–5
–0.5
G
O
–0.4
–0.2
–0.1
0
0.5
0.2
–3
–1
0
5
4
1966 G03
–0.3
0.3
0.4
0.1
–0.5
–0.4
–0.2
–0.1
0
0.5
0.2
–0.3
0.3
0.4
0.1
–4
–2
1
2
3
V
DD
= 5V
V
SS
= –5V
V
IOS
V
OOS
GAIN ERROR
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