參數(shù)資料
型號: LTC1998C
廠商: Linear Technology Corporation
英文描述: Quadruple Bus Buffer Gates With 3-State Outputs 14-SO -40 to 85
中文描述: 2.5uA,1%精度,采用SOT - 23比較器和電池電壓參考監(jiān)測
文件頁數(shù): 7/8頁
文件大小: 143K
代理商: LTC1998C
LTC1998
7
1998f
Figure 4. LTC1998 Function Plot
R
R
(
R
R
V
V
TH
1
1
2
3
5
1
2
=
+
+
)
Solve for the sum of
(
)
(
)
.
R
R
R
R
R
V
V
BATT Th
1
2
1
2
3
5
1
+
=
+
+
then solve for R2 and R3.
Example: A system needs to detect a low battery voltage of
3V (V
BATT.Th
= 3V) with 250mV hysteresis (V
TH2
= 3.25V).
Set the value of the resistor divider (R1 + R2 + R3) = 1M.
R1 = 539k, R1 + R2 = 667k, R2 = 128k, R3 = 333k. Choose
the closest 1% values, that is 536k, 332k, 127k. Figure 4
graphically shows the function of the LTC1998 as
described above.
VERSATILE OUTPUT DRIVER
V
LOGIC
, BATTLO (Pins 5,6)
The LTC1998 uses a CMOS push-pull output stage to drive
the low battery output signal. This output pin (BATTLO)
APPLICATIOU
W
U
U
PACKAGE DESCRIPTIO
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD
FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
has a separate supply pin, (V
LOGIC
) that can be used to
provide an output voltage rail matching the V
DD
logic of
microprocessors. The V
LOGIC
pin may be tied to a voltage
lower than the voltage at the BATT pin. The V
LOGIC
pin may
also be tied to a voltage higher than V
BATT
via a series
resistor greater than 10k
. The output will then act as an
open-drain device.
In a given application, if it is possible for BATTLO to be
shorted to GND or a supply, a series resistor should be
added to limit the short-circuit current to 5mA.
1998 F04
PROGRAMMABLE
THRESHOLD RANGE
HYSTERESIS
PROGRAMMED
HYSTERESIS
THRESHOLD
PROGRAMMED
LOW BATT
THRESHOLD
V
LOGIC
BATTLO
BATTERY VOLTAGE
RECOVERS UNDER
REDUCED LOAD
BATTERY
VOLTAGE
3.25V
2.50V
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