參數(shù)資料
型號(hào): LTC2053IMS8
廠商: LINEAR TECHNOLOGY CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Precision Instrumentation Amplifier
中文描述: INSTRUMENTATION AMPLIFIER, 20 uV OFFSET-MAX, PDSO8
封裝: PLASTIC, MSOP-8
文件頁數(shù): 9/12頁
文件大?。?/td> 288K
代理商: LTC2053IMS8
LTC2053
9
2053fa
EN (Pin 1):
Active Low Enable Pin.
–IN (Pin 2):
Inverting Input.
+IN (Pin 3):
Noninverting Input.
V
(Pin 4):
Negative Supply.
REF (Pin 5):
Voltage Reference (V
REF
) for Amplifier Output.
PIU
RG (Pin 6):
Inverting Input of Internal Op Amp. With a
resistor, R2, connected between the OUT pin and the RG
pin and a resistor, R1, between the RG pin and the REF pin,
the DC gain is given by 1 + R2 / R1.
OUT (Pin 7):
Amplifier Output.
V
OUT
= GAIN (V
+IN
– V
–IN
) + V
REF
V
+
(Pin 8):
Positive Supply.
BLOCK DIAGRA
W
+
ZERO-DRIFT
OP AMP
C
H
OUT
2053 BD
4
V
5
REF
6
RG
8
V
+
1
EN
3
+IN
2
–IN
C
S
7
APPLICATIU
W
U
U
Theory of Operation
The LTC2053 uses an internal capacitor (C
S
) to sample a
differential input signal riding on a DC common mode
voltage (see Block Diagram). This capacitor’s charge is
transferred to a second internal hold capacitor (C
H
) trans-
lating the common mode of the input differential signal to
that of the REF pin. The resulting signal is amplified by a
zero-drift op amp in the noninverting configuration. The
RG pin is the negative input of this op amp and allows
external programmability of the DC gain. Simple filtering
can be realized by using an external capacitor across the
feedback resistor.
Input Voltage Range
The input common mode voltage range of the LTC2053 is
rail-to-rail. However, the following equation limits the size
of the differential input voltage:
V
(V
+IN
– V
–IN
) + V
REF
V
+
– 1.3
Where V
+IN
and V
–IN
are the voltages of the +IN and –IN
pins respectively, V
REF
is the voltage at the REF pin and V
+
is the positive supply voltage.
For example, with a 3V single supply and a 0V to 100mV
differential input voltage, V
REF
must be between 0V and
1.6V.
±
5 Volt Operation
When using the LTC2053 with supplies over 5.5V, care
must be taken to limit the maximum difference between
any of the input pins (+IN or –IN) and the REF pin to 5.5V;
if not, the device will be damaged. For example, if rail-to-
rail input operation is desired when the supplies are at
±
5V, the REF pin should be 0V,
±
0.5V. As a second
example, if V
+
is 10V and V
and REF are at 0V, the inputs
should not exceed 5.5V.
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