- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385506 > LTC2208UP (Linear Technology Corporation) 16-Bit, 130Msps ADC PDF資料下載
參數(shù)資料
| 型號： | LTC2208UP |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 16-Bit, 130Msps ADC |
| 中文描述： | 16位，130Msps ADC |
| 文件頁數(shù)： | 19/32頁 |
| 文件大小： | 1222K |
| 代理商： | LTC2208UP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
LTC2208
19
2208fa
input change is large, such as the change seen with input
frequencies near Nyquist, then a larger charging glitch
will be seen.
Common Mode Bias
The ADC sample-and-hold circuit requires differential
drive to achieve specified performance. Each input should
swing ±0.5625V for the 2.25V range (PGA = 0) or ±0.375V
for the 1.5V range (PGA = 1), around a common mode
voltage of 1.25V. The V
CM
output pin (Pin 3) is designed
to provide the common mode bias level. V
CM
can be tied
directly to the center tap of a transformer to set the DC
input level or as a reference level to an op amp differential
driver circuit. The V
CM
pin must be bypassed to ground
close to the ADC with 2.2μF or greater.
Input Drive Impedence
As with all high performance, high speed ADCs the dy-
namic performance of the LTC2208 can be influenced
by the input drive circuitry, particularly the second and
third harmonics. Source impedance and input reactance
can influence SFDR. At the falling edge of ENC the
sample and hold circuit will connect the 4.9pF sampling
capacitor to the input pin and start the sampling period.
The sampling period ends when ENC rises, holding the
sampled input on the sampling capacitor. Ideally, the
input circuitry should be fast enough to fully charge
the sampling capacitor during the sampling period
1/(2F encode); however, this is not always possible and the
incomplete settling may degrade the SFDR. The sampling
glitch has been designed to be as linear as possible to
minimize the effects of incomplete settling.
For the best performance it is recommended to have a
source impedence of 100
Ω
or less for each input. The
source impedence should be matched for the differential
inputs. Poor matching will result in higher even order
harmonics, especially the second.
INPUT DRIVE CIRCUITS
Input Filtering
A first order RC low pass filter at the input of the ADC can
serve two functions: limit the noise from input circuitry and
provide isolation from ADC S/H switching. The LTC2208
has a very broadband S/H circuit, DC to 700MHz; it can
be used in a wide range of applications; therefore, it is not
possible to provide a single recommended RC filter.
Figures 3, 4a and 4b show three examples of input RC
filtering at three ranges of input frequencies. In general
it is desirable to make the capacitors as large as can be
tolerated—this will help suppress random noise as well
as noise coupled from the digital circuitry. The LTC2208
does not require any input filter to achieve data sheet
specifications; however, no filtering will put more stringent
noise requirements on the input drive circuitry.
Transformer Coupled Circuits
Figure 3 shows the LTC2208 being driven by an RF trans-
former with a center-tapped secondary. The secondary
center tap is DC biased with V
CM
, setting the ADC input
signal at its optimum DC level. Figure 3 shows a 1:1 turns
ratio transformer. Other turns ratios can be used; however,
as the turns ratio increases so does the impedance seen by
the ADC. Source impedance greater than 50
Ω
can reduce
the input bandwidth and increase high frequency distor-
tion. A disadvantage of using a transformer is the loss of
low frequency response. Most small RF transformers have
poor performance at frequencies below 1MHz.
Center-tapped transformers provide a convenient means
of DC biasing the secondary; however, they often show
poor balance at high input frequencies, resulting in large
2nd order harmonics.
Figure 3. Single-Ended to Differential Conversion
Using a Transformer. Recommended for Input
Frequencies from 5MHz to 100MHz
APPLICATIU
W
U
U
35
5
35
10
10
5
5
0.1
μ
F
A
IN+
A
IN–
8.2pF
2.2
μ
F
8.2pF
8.2pF
V
CM
LTC2208
T1
T1 = MA/COM ETC1-1T
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
EXCEPT 2.2
μ
F
2208 F03
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC2356-12 | Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown |
| LTC2356-14 | Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown |
| LTC2356CMSE-12 | Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown |
| LTC2356CMSE-14 | Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown |
| LTC2356IMSE-12 | Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2208UP-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 130Msps ADC |
| LTC2209 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:10GHz GBW, 1.1nV/Hz Differential Amplifier/ADC Driver |
| LTC2209CUP | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 160Msps ADC |
| LTC2209CUP#PBF | 制造商:Linear Technology 功能描述:Single ADC Pipelined 160Msps 16-bit Parallel/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 160MSPS 64-QFN 制造商:Linear Technology 功能描述:IC 16BIT ADC 160MSPS 64QFN 制造商:Linear Technology 功能描述:IC, 16BIT ADC, 160MSPS, 64QFN 制造商:Linear Technology 功能描述:MS-ADC/High Speed, 16-bit, 160Msps ADC 制造商:Linear Technology 功能描述:IC, ADC, 16BIT, 160MSPS, QFN-64, Resolution (Bits):16bit, Sampling Rate:160MSPS, Supply Voltage Type:Single, Supply Voltage Min:3.135V, Supply Voltage Max:3.465V, Supply Current:440mA, Digital IC Case Style:QFN, No. of Pins:64 , RoHS Compliant: Yes |
| LTC2209CUP#TRPBF | 制造商:Linear Technology 功能描述:IC ADC 16BIT 160MSPS 64-QFN 制造商:Linear Technology 功能描述:MS-ADC/High Speed, 16-bit, 160Msps ADC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。