參數(shù)資料
型號: LTC2233CUK#TRPBF
廠商: Linear Technology
文件頁數(shù): 14/28頁
文件大小: 0K
描述: IC ADC 10BIT 80MSPS SAMPL 48QFN
標準包裝: 2,000
位數(shù): 10
采樣率(每秒): 80M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 406mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤
供應商設(shè)備封裝: 48-QFN-EP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個單端,雙極; 1 個差分,雙極
LTC2232/LTC2233
21
22323fa
The lower limit of the LTC2232/LTC2233 sample rate is
determined by droop of the sample-and-hold circuits. The
pipelined architecture of this ADC relies on storing analog
signals on small valued capacitors. Junction leakage will
discharge the capacitors. The specified minimum operat-
ing frequency for the LTC2232/LTC2233 is 1Msps.
DIGITAL OUTPUTS
Table 1 shows the relationship between the analog input
voltage, the digital data bits and the overflow bit.
APPLICATIO S I FOR ATIO
WU
UU
Figure 12a. Single-Ended ENC Drive,
Not Recommended for Low Jitter
Digital Output Buffers
Figure 13 shows an equivalent circuit for a single output
buffer. Each buffer is powered by OVDD and OGND, iso-
lated from the ADC power and ground. The additional N-
channel transistor in the output driver allows operation
down to low voltages. The internal resistor in series with
the output makes the output appear as 50
to external
circuitry and may eliminate the need for external damping
resistors.
As with all high speed/high resolution converters, the
digital output loading can affect the performance. The
digital outputs of the LTC2232/LTC2233 should drive a
minimal capacitive load to avoid possible interaction be-
tween the digital outputs and sensitive input circuitry. The
output should be buffered with a device such as an
ALVCH16373 CMOS latch. For full speed operation the
capacitive load should be kept under 10pF.
Lower OVDD voltages will also help reduce interference
from the digital outputs.
Figure 12b. ENC Drive Using a CMOS to PECL Translator
22323 F12a
ENC
1.6V
VTHRESHOLD = 1.6V
ENC+
0.1
F
LTC2232/
LTC2233
22323 F12b
ENC
ENC+
130
3.3V
130
D0
Q0
MC100LVELT22
LTC2232/
LTC2233
83
83
Figure 13. Digital Output Buffer
LTC2232/LTC2233
22323 F13
OVDD
VDD
0.1
F
43
TYPICAL
DATA
OUTPUT
OGND
OVDD
0.5V
TO 3.6V
PREDRIVER
LOGIC
DATA
FROM
LATCH
OE
Table 1. Output Codes vs Input Voltage
AIN+ – AIN–
D9 – D0
(2V Range)
OF
(Offset Binary)
(2’s Complement)
>+1.000000V
1
11 1111 1111
01 1111 1111
+0.998047V
0
11 1111 1111
01 1111 1111
+0.996094V
0
11 1111 1110
01 1111 1110
+0.001953V
0
10 0000 0001
00 0000 0001
0.000000V
0
10 0000 0000
00 0000 0000
–0.001953V
0
01 1111 1111
11 1111 1111
–0.003906V
0
01 1111 1110
11 1111 1110
–0.998047V
0
00 0000 0001
10 0000 0001
–1.000000V
0
00 0000 0000
10 0000 0000
<–1.000000V
1
00 0000 0000
10 0000 0000
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LTC2233IUK#TRPBF 功能描述:IC ADC 10BIT 80MSPS SAMPL 48QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率(每秒):300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC(0.295",7.50mm 寬) 供應商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端,單極;1 個單端,雙極
LTC2233UK 制造商:LINER 制造商全稱:Linear Technology 功能描述:10-Bit,105Msps/80Msps ADCs