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參數(shù)資料
| 型號(hào)： | LTC2255IUH |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 14-Bit, 125/105Msps Low Power 3V ADCs |
| 中文描述： | 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, MO-220-WHHD, QFN-32 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 608K |
| 代理商： | LTC2255IUH |
LTC2255/LTC2254
5
22554f
TIW
range, otherwise specifications are at T
A
= 25
°
C. (Note 4)
The
●
denotes the specifications which apply over the full operating temperature
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 125MHz (LTC2255) or 105MHz (LTC2254),
input range = 2V
P-P
with differential drive, clock duty cycle stabilizer on,
unless otherwise noted.
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 0000 and
11 1111 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 125MHz (LTC2255) or 105MHz (LTC2254),
input range = 1V
P-P
with differential drive.
Note 9:
Recommended operating conditions.
LTC2255
TYP
LTC2254
TYP
SYMBOL
f
s
t
L
PARAMETER
Sampling Frequency
CLK Low Time
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
MIN
1
3.8
3
MAX
125
500
500
MIN
1
4.5
3
MAX
105
500
500
UNITS
MHz
●
●
●
4
4
4.76
4.76
ns
ns
t
H
CLK High Time
●
●
3.8
3
4
4
500
500
4.5
3
4.76
4.76
500
500
ns
ns
t
AP
Sample-and-Hold
Aperture Delay
CLK to DATA delay
Data Access Time
After OE
↓
BUS Relinquish Time
0
0
ns
t
D
C
L
= 5pF (Note 7)
C
L
= 5pF (Note 7)
●
1.4
2.7
4.3
5.4
10
1.4
2.7
4.3
5.4
10
ns
ns
●
(Note 7)
●
3.3
6
8.5
3.3
6
8.5
ns
Pipeline Latency
Cycles
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| LTC2255IUH#PBF | 功能描述:IC ADC 14-BIT 125MSPS 3V 32-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
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| LTC2256-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 65/40/2 5Msps Ultralow Power 1.8V ADCs |
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