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參數資料
| 型號： | LTC2260IUJ-14#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數： | 21/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 105MSPS 40-QFN |
| 產品培訓模塊： | LTC2262 - Ultra Low Power High Speed ADCs |
| 標準包裝： | 2,000 |
| 位數： | 14 |
| 采樣率（每秒）： | 105M |
| 數據接口： | 并聯 |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 125mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 40-QFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸入數目和類型： | 1 個差分 |
| 配用： | DC890B-ND - BOARD USB DATA COLLECTION |
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LTC2261-14
LTC2260-14/LTC2259-14
28
226114fc
For more information www.linear.com/LTC2261-14
applicaTions inForMaTion
REGISTER A4: DATA FORMAT REGISTER (ADDRESS 04h)
D7
D6
D5
D4
D3
D2
D1
D0
X
OUTTEST2
OUTTEST1
OUTTEST0
ABP
RAND
TWOSCOMP
Bit 7-6
Unused, Don’t Care Bits.
Bits 5-3
OUTTEST2:OUTTEST0
Digital Output Test Pattern Bits
000 = Digital Output Test Patterns Off
001 = All Digital Outputs = 0
011 = All Digital Outputs = 1
101 = Checkerboard Output Pattern. OF, D13-D0 Alternate Between 101 0101 0101 0101 and 010 1010 1010 1010
111 = Alternating Output Pattern. OF, D13-D0 Alternate Between 000 0000 0000 0000 and 111 1111 1111 1111
Note: Other Bit Combinations are not Used
Bit 2
ABP
Alternate Bit Polarity Mode Control Bit
0 = Alternate Bit Polarity Mode Off
1 = Alternate Bit Polarity Mode On
Bit 1
RAND
Data Output Randomizer Mode Control Bit
0 = Data Output Randomizer Mode Off
1 = Data Output Randomizer Mode On
Bit 0
TWOSCOMP Two’s Complement Mode Control Bit
0 = Offset Binary Data Format
1 = Two’s Complement Data Format
Note: ABP = 1 Forces the Output Format to be Offset Binary
GROUNDING AND BYPASSING
The LTC2261-14 requires a printed circuit board with a
clean unbroken ground plane. A multilayer board with
an internal ground plane is recommended. Layout for
the printed circuit board should ensure that digital and
analog signal lines are separated as much as possible. In
particular, care should be taken not to run any digital track
alongside an analog signal track or underneath the ADC.
High quality ceramic bypass capacitors should be used at
the VDD, OVDD, VCM, VREF, REFH and REFL pins. Bypass
capacitorsmustbelocatedasclosetothepinsaspossible.
Of particular importance is the 0.1F capacitor between
REFH and REFL. This capacitor should be on the same
side of the circuit board as the A/D, and as close to the
device as possible (1.5mm or less). Size 0402 ceramic
capacitors are recommended. The larger 2.2F capacitor
between REFH and REFL can be somewhat further away.
The VCM capacitor should be located as close to the pin
as possible. To make space for this the capacitor on VREF
can be further away or on the back of the PC board. The
traces connecting the pins and bypass capacitors must
be kept short and should be made as wide as possible.
The analog inputs, encode signals, and digital outputs
should not be routed next to each other. Ground fill and
grounded vias should be used as barriers to isolate these
signals from each other.
HEAT TRANSFER
Most of the heat generated by the LTC2261-14 is trans-
ferred from the die through the bottom-side exposed pad
and package leads onto the printed circuit board. For good
electrical and thermal performance, the exposed pad must
be soldered to a large grounded pad on the PC board.
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相關代理商/技術參數 |
參數描述 |
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| LTC2260UJ-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs |
| LTC2260UJ-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs |
| LTC2261-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs |
| LTC2261-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2261CUJ-12#PBF | 功能描述:IC ADC 12-BIT 125MSPS 40-QFN RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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