(408) 432-1900
參數(shù)資料
型號(hào): LTC2306IDD#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 13/20頁(yè)
文件大小: 0K
描述: IC ADC 12BIT 2CH 500KSPS 10-DFN
標(biāo)準(zhǔn)包裝: 121
位數(shù): 12
采樣率(每秒): 500k
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 14mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 10-DFN(3x3)
包裝: 管件
輸入數(shù)目和類(lèi)型: 2 個(gè)單端,單極;2 個(gè)單端,雙極;1 個(gè)差分,單極;1 個(gè)差分,雙極
產(chǎn)品目錄頁(yè)面: 1347 (CN2011-ZH PDF)
LTC2302/LTC2306
20
23026fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2008
LT 0908 REV A PRINTED IN USA
TYPICAL APPLICATION
Clock Squaring/Level Shifting Circuit Allows Testing with RF Sine Generator,
Convert Re-Timing Flip-Flop Preserves Low Jitter Clock Timing
SDI
SDO
SCK
CONVST
SERIAL
PORT
ANALOG
INPUT
MUX
CH0 (IN+)
CH1 (IN)
VREF
CONVERT ENABLE
MASTER
CLOCK
RF SIGNAL
GENERATOR
OR OTHER LOW
JITTER SOURCE
VCC
0.1μF
NC7SVU04P5X
LTC2302
LTC2306
VDD
OVDD
GND
MASTER
CLOCK
CONVERT
ENABLE
JITTER
0.1μF
12-BIT
500ksps
ADC
+
10μF
0.1μF
1k
10μF
0.1μF
QD
PRE
VCC
NL17SZ74
CONTROL
LOGIC
(FPGA, CPLD,
DSP, ETC.)
Q CLR
1k
23026 TA02
50Ω
CONVST
DATA TRANSFER
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