參數(shù)資料
型號(hào)： LTC2362HTS8#TRMPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 10/20頁(yè)
文件大小： 0K
描述： IC ADC 12BIT 500KSPS TSOT23-8
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
采樣率（每秒）： 500k
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 7.2mW
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： SOT-23-8 薄型，TSOT-23-8
供應(yīng)商設(shè)備封裝： TSOT-23-8
包裝： 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型： 1 個(gè)單端，單極
其它名稱： LTC2362HTS8#TRMPBFDKR
LTC2360/LTC2361/LTC2362
18
236012fa
APPLICATIONS INFORMATION
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolution
and/or high speed A/D converters. To obtain the best per-
formance from the LTC2360/LTC2361/LTC2362, a printed
circuit board with ground plane is required. Layout for the
printed circuit board should ensure that digital and analog
signal lines are separated as much as possible. In particular,
care should be taken not to run any digital track alongside
an analog signal track or underneath the ADC. The analog
input should be screened by the ground plane.
High quality tantalum and ceramic bypass capacitors
should be used at the VDD pin as shown in the Block
Diagram on the rst page of this data sheet. For optimum
performance, a 2.2μF surface mount AVX capacitor with
a 0.1μF ceramic is recommended for the VDD and VREF
pins. Alternatively, 2.2μF ceramic chip capacitors such as
Murata GRM235Y5V106Z016 may be used. The capacitors
must be located as close to the pins as possible. The traces
connecting the pins and the bypass capacitors must be
kept short and should be made as wide as possible.
Figure 16 shows the recommended system ground con-
nections. All analog circuitry grounds should be terminated
at the LTC2360/LTC2361/LTC2362. The ground return
from the LTC2360/LTC2361/LTC2362 to the power supply
should be low impedance for noise free operation. Digital
circuitry grounds must be connected to the digital supply
common.
In applications where the ADC data outputs and control sig-
nals are connected to a continuously active microprocessor
bus, it is possible to get errors in the conversion results.
These errors are due to feedthrough from the micropro-
cessor to the successive approximation comparator. The
problem can be eliminated by forcing the microprocessor
into a wait state during conversion or by using three-state
buffers to isolate the ADC data bus.
Figure 16. Power Supply Ground Practice
236012 F16
GND
AIN
VDD
CAIN
CONV
SDO
SCK
CVDD
PIN 1
VIAS TO GROUND PLANE
+
2.2μF
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