參數(shù)資料
型號(hào)： LTC2383IDE-16#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 2/24頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT 1CH 1MSPS 16-DFN
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 16
采樣率（每秒）： 1M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 16.25mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 16-DFN（4x3）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)差分，雙極
配用： DC1571A-A-ND - BOARD SAR ADC LTC2383-16
LTC2383-16
10
238316f
OVERVIEW
The LTC2383-16 is a low noise, low power, high speed 16-bit
successive approximation register (SAR) ADC. Operating
from a single 2.5V supply, the LTC2383-16 supports a
large ±2.5V fully differential input range, making it ideal
for high performance applications which require a wide
dynamic range. The LTC2383-16 achieves ±2LSB INL max,
no missing codes at 16-bits and 92dB SNR.
Fast 1Msps throughput with no cycle latency makes the
LTC2383-16 ideally suited for a wide variety of high speed
applications. An internal oscillator sets the conversion time,
easing external timing considerations. The LTC2383-16
dissipates only 13mW at 1Msps, while an auto power-down
feature is provided to further reduce power dissipation
during inactive periods.
CONVERTER OPERATION
The LTC2383-16 operates in two phases. During the
acquisition phase, the charge redistribution capacitor D/A
converter (CDAC) is connected to the IN+ and IN– pins
to sample the differential analog input voltage. A rising
edge on the CNV pin initiates a conversion. During the
conversion phase, the 16-bit CDAC is sequenced through a
successive approximation algorithm, effectively comparing
the sampled input with binary-weighted fractions of the
reference voltage (e.g. VREF/2,VREF/4…VREF/65536)using
the differential comparator. At the end of conversion, the
CDAC output approximates the sampled analog input. The
ADC control logic then prepares the 16-bit digital output
code for serial transfer.
TRANSFER FUNCTION
The LTC2383-16 digitizes the full-scale voltage of 2 × REF
into 216 levels, resulting in an LSB size of 76μV with
REF = 2.5V. The ideal transfer function is shown in Figure 2.
The output data is in 2’s complement format.
ANALOG INPUT
The analog inputs of the LTC2383-16 are fully differential
in order to maximize the signal swing that can be digitized.
The analog inputs can be modeled by the equivalent
APPLICATIONS INFORMATION
Figure 2. LTC2383-16 Transfer Function
INPUT VOLTAGE (V)
0V
OUTPUT
CODE
(TWO’S
COMPLEMENT)
–1
LSB
238316 F02
011...111
011...110
000...001
000...000
100...000
100...001
111...110
1
LSB
BIPOLAR
ZERO
111...111
FSR/2 – 1LSB
–FSR/2
FSR = +FS – –FS
1LSB = FSR/65536
circuit shown in Figure 3. The diodes at the input provide
ESD protection. In the acquisition phase, each input sees
approximately 45pF (CIN)fromthesamplingCDACinseries
with 40Ω (RON) from the on-resistance of the sampling
switch. Any unwanted signal that is common to both
inputs will be reduced by the common mode rejection of
the ADC. The inputs draw a current spike while charging
the CIN capacitors during acquisition. During conversion,
the analog inputs draw only a small leakage current.
RON
CIN
RON
REF
CIN
IN+
IN–
BIAS
VOLTAGE
238316 F03
Figure 3. The Equivalent Circuit for the
Differential Analog Input of the LTC2383-16
INPUT DRIVE CIRCUITS
A low impedance source can directly drive the high
impedance inputs of the LTC2383-16 without gain error.
A high impedance source should be buffered to minimize
settling time during acquisition and to optimize the
distortion performance of the ADC. Minimizing settling
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