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參數(shù)資料
| 型號(hào)： | LTC2408CG |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 4-/8-Channel 24-Bit uPower No Latency ADCs |
| 中文描述： | 8-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | 0.209 INCH, PLASTIC, SSOP-28 |
| 文件頁(yè)數(shù)： | 9/36頁(yè) |
| 文件大?。?/td> | 351K |
| 代理商： | LTC2408CG |
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9
LTC2404/LTC2408
INL vs Maximum Output Rate
Resolution vs Maximum
Output Rate
TYPICAL PERFOR U
PI
FU
CTIO
N
S
U
U
GND (Pins 1, 5, 16, 18, 22, 27, 28):
Ground. Should be
connected directly to a ground plane through a minimum
length trace or it should be the single-point-ground in a
single point grounding system.
V
CC
(Pins 2, 8):
Positive Supply Voltage. 2.7V
≤
V
CC
≤
5.5V. Bypass to GND with a 10
μ
F tantalum capacitor in
parallel with 0.1
μ
F ceramic capacitor as close to the part
as possible.
V
REF
(Pin 3):
Reference Input. The reference voltage range
is 0.1V to V
CC
.
ADCIN (Pin 4):
Analog Input. The input voltage range is
–0.125 V
REF
to 1.125 V
REF
. For V
REF
> 2.5V the input
voltage range may be limited by the pin absolute maxi-
mum rating of –0.3V to V
CC
+ 0.3V.
COM (Pin 6):
Signal Ground. Should be connected directly
to a ground plane through minimum length trace.
MUXOUT (Pin 7):
MUX Output. This pin is the output of the
multiplexer. Tie to ADCIN for normal operation.
CH0 (Pin 9):
Analog Multiplexer Input.
CH1 (Pin 10):
Analog Multiplexer Input.
CH2 (Pin 11):
Analog Multiplexer Input.
CH3 (Pin 12):
Analog Multiplexer Input.
MAXIMUM OUTPUT RATE (Hz)
0
I
12
18
20
60
24048 G27
10
8
15 20 25
10
5
30 35 40 45 50 55
24
22
16
14
V
CC
= 5V
V
REF
= 5V
F
(20480
×
MAXIMUM
OUTPUT RATE)
T
A
= 25
°
C
T
A
= 90
°
C
MAXIMUM OUTPUT RATE (Hz)
0
R
12
18
20
60
24048 G28
10
8
15 20 25
10
5
30 35 40 45 50 55
24
22
16
14
F
= EXTERNAL
(20480
×
MAXIMUM
OUTPUT RATE)
T
A
= 25
°
C
T
A
= 90
°
C
*RESOLUTION = LOG(V
REF
/RMS NOISE)
LOG (2)
V
CC
= V
REF
= 5V
V
CC
= V
REF
= 3V
CH4 (Pin 13):
Analog Multiplexer Input. No connect on the
LTC2404.
CH5 (Pin 14):
Analog Multiplexer Input. No connect on the
LTC2404.
CH6 (Pin 15):
Analog Multiplexer Input. No connect on the
LTC2404.
CH7 (Pin 17):
Analog Multiplexer Input. No connect on the
LTC2404.
CLK (Pin 19):
Shift Clock for Data In. This clock synchro-
nizes the serial data transfer into the MUX. For normal
operation, drive this pin in parallel with SCK.
CSMUX (Pin 20):
MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
IN
(Pin 21):
Digital Data Input. The multiplexer address
is shifted into this input on the last four rising CLK edges
before CSMUX goes low.
CSADC (Pin 23):
ADC Chip Select Input. A low on this pin
enables the SDO digital output and following each conver-
sion, the ADC automatically enters the Sleep mode and
remains in this low power state as long as CSADC is high.
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