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| 型號： | LTC2411-1CMS#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 17/40頁 |
| 文件大小： | 0K |
| 描述： | IC A/DCONV DIFF INPUT&REF 10MSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 6.8 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 1mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
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LTC2411/LTC2411-1
24
Larger values of input capacitors (CIN > 0.01F) may be
required in certain configurations for antialiasing or gen-
eral input signal filtering. Such capacitors will average the
input sampling charge and the external source resistance
will see a quasi constant input differential impedance. For
the LTC2411, when FO = LOW (internal oscillator and 60Hz
notch), the typical differential input resistance is 5.4M
which will generate a gain error of approximately 0.093ppm
for each ohm of source resistance driving IN+ or IN–.
When FO = HIGH (internal oscillator and 50Hz notch), the
typical differential input resistance is 6.5M
which will
generate a gain error of approximately 0.077ppm for each
ohm of source resistance driving IN+ or IN–. For the
LTC2411-1, the typical differential input resistance is
6M
which will generate a gain error of approximately
0.084ppm for each ohm of source resistance driving IN+
or IN– (FO = LOW). When FO is driven by an external
oscillator with a frequency fEOSC (external conversion
clock operation), the typical differential input resistance is
0.83 1012/fEOSC and each ohm of source resistance
driving IN+ or IN– will result in 0.59 10–6 fEOSCppm gain
error. The effect of the source resistance on the two input
pins is additive with respect to this gain error. The typical
+FS and –FS errors as a function of the sum of the source
resistance seen by IN+ and IN– for large values of CIN are
shown in Figure 15.
In addition to this gain error, an offset error term may also
appear. The offset error is proportional with the mismatch
between the source impedance driving the two input pins
IN+ and IN– and with the difference between the input and
reference common mode voltages. While the input drive
circuit nonzero source impedance combined with the
converter average input current will not degrade the INL
performance, indirect distortion may result from the modu-
lation of the offset error by the common mode component
of the input signal. Thus, when using large CIN capacitor
values, it is advisable to carefully match the source imped-
ance seen by the IN+ and IN– pins. For the LTC2411, when
FO = LOW (internal oscillator and 60Hz notch), every 1
mismatch in source impedance transforms a full-scale
common mode input signal into a differential mode input
signal of 0.093ppm. When FO = HIGH (internal oscillator
and 50Hz notch), every 1
mismatch in source imped-
ance transforms a full-scale common mode input signal
into a differential mode input signal of 0.077ppm. For the
LTC2411-1, when internal oscillator is used (FO = LOW),
every 1
mismatch in source impedance transforms a
full-scale common mode input signal into a differential
mode input signal of 0.084ppm. When FO is driven by an
external oscillator with a frequency fEOSC, every 1 mis-
match in source impedance transforms a full-scale com-
mon mode input signal into a differential mode input
signal of 0.59 10–6 fEOSCppm. Figure 16 shows the
typical offset error due to input common mode voltage for
various values of source resistance imbalance between
the IN+ and IN– pins when large CIN values are used.
If possible, it is desirable to operate with the input signal
common mode voltage very close to the reference signal
common mode voltage as is the case in the ratiometric
measurement of a symmetric bridge. This configuration
APPLICATIO S I FOR ATIO
WU
UU
RSOURCE ()
0 100 200 300 400 500 600 700 800 900 1000
+FS
ERROR
(ppm
OF
V
REF
)
2411 F15a
120
100
80
60
40
20
0
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = 3.75V
IN– = 1.25V
FO = GND
TA = 25°C
CIN = 1F
CIN = 0.1F
CIN = 0.01F
CIN = 10F
Figure 15a. + FS Error vs RSOURCE at IN+ or IN– (Large CIN)
Figure 15b. – FS Error vs RSOURCE at IN
+ or IN– (Large CIN)
RSOURCE ()
0 100 200 300 400 500 600 700 800 900 1000
–
FS
ERROR
(ppm
OF
V
REF
)
2411 F15b
–120
–100
–80
–60
–40
–20
0
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = 1.25V
IN– = 3.75V
FO = GND
TA = 25°C
CIN = 1F
CIN = 0.1F
CIN = 0.01F
CIN = 10F
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| LTC2411-1IMS#TR | 功能描述:IC A/DCONV DIFF INPUT&REF 10MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
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