參數(shù)資料
型號: LTC2411CMS
英文描述: Analog-to-Digital Converter, 24-Bit
中文描述: 模擬到數(shù)字轉(zhuǎn)換器,24比特
文件頁數(shù): 15/40頁
文件大小: 450K
代理商: LTC2411CMS
LTC2411
22
Particular attention must be given to the connection of the
FO signal when the LTC2411 is used with an external
conversion clock. This clock is active during the conver-
sion time and the normal mode rejection provided by the
internal digital filter is not very high at this frequency. A
normal mode signal of this frequency at the converter
reference terminals may result into DC gain and INL
errors. A normal mode signal of this frequency at the
converter input terminals may result into a DC offset error.
Such perturbations may occur due to asymmetric capaci-
tive coupling between the FO signal trace and the converter
input and/or reference connection traces. An immediate
solution is to maintain maximum possible separation
between the FO signal trace and the input/reference sig-
nals. When the FO signal is parallel terminated near the
converter, substantial AC current is flowing in the loop
formed by the FO connection trace, the termination and the
ground return path. Thus, perturbation signals may be
inductively coupled into the converter input and/or refer-
ence. In this situation, the user must reduce to a minimum
the loop area for the FO signal as well as the loop area for
the differential input and reference connections.
Driving the Input and Reference
The input and reference pins of the LTC2411 converter are
directly connected to a network of sampling capacitors.
Depending upon the relation between the differential input
voltage and the differential reference voltage, these ca-
pacitors are switching between these four pins transfering
small amounts of charge in the process. A simplified
equivalent circuit is shown in Figure 11.
For a simple approximation, the source impedance RS
driving an analog input pin (IN+, IN, REF+ or REF) can be
considered to form, together with RSW and CEQ (see
Figure 11), a first order passive network with a time
constant
τ = (RS + RSW) CEQ. The converter is able to
sample the input signal with better than 1ppm accuracy if
the sampling period is at least 14 times greater than the
input circuit time constant
τ. The sampling process on the
four input analog pins is quasi-independent so each time
constant should be considered by itself and, under worst-
case circumstances, the errors may add.
When using the internal oscillator (FO = LOW or HIGH), the
LTC2411’s front-end switched-capacitor network is clocked
at 76800Hz corresponding to a 13
s sampling period.
APPLICATIO S I FOR ATIO
WU
UU
Figure 11. LTC2411 Equivalent Analog Input Circuit
VREF+
VIN+
VCC
RSW (TYP)
20k
ILEAK
VCC
ILEAK
VCC
RSW (TYP)
20k
CEQ
6pF
(TYP)
RSW (TYP)
20k
ILEAK
IIN+
VIN
IIN
IREF+
IREF
2411 F11
ILEAK
VCC
ILEAK
SWITCHING FREQUENCY
fSW = 76800Hz INTERNAL OSCILLATOR (FO = LOW OR HIGH)
fSW = 0.5 fEOSC EXTERNAL OSCILLATOR
VREF
RSW (TYP)
20k
IIN
VV
V
R
IIN
VV
V
R
I REF
VV
V
R
V
VR
I REF
VV
V
R
V
VR
where
AVG
IN
INCM
REFCM
EQ
AVG
IN
INCM
REFCM
EQ
AVG
REF
INCM
REFCM
EQ
IN
REF
EQ
AVG
REF
INCM
REFCM
EQ
IN
REF
EQ
+
+
() = +
() = +
() = +
() = +
+
05
15
05
15
05
2
.
::
.
./
V
REF
V
REF
VIN
IN
V
IN
R
M
INTERNAL OSCILLATOR
Hz Notch F
LOW
R
M
INTERNAL OSCILLATOR
Hz Notch F
HIGH
R
f
EXTERNAL OSCILLATOR
REF
REFCM
IN
INCM
EQ
O
EQ
O
EQ
EOSC
=
+
=
==
()
==
()
=
()
+
2
10 8
60
13 0
50
167 1012
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