- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377769 > LTC2415-1CGN (LINEAR TECHNOLOGY CORP) 24-Bit No Latency ADCs with Differential Input and Differential Reference PDF資料下載
參數(shù)資料
| 型號： | LTC2415-1CGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 24-Bit No Latency ADCs with Differential Input and Differential Reference |
| 中文描述： | 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 20/40頁 |
| 文件大小： | 605K |
| 代理商： | LTC2415-1CGN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
LTC2415/LTC2415-1
20
sn2415 24151fs
APPLICATIU
W
U
U
Figure 9. External Serial Clock, Reduced Data Output Length
SDO
SCK
(EXTERNAL)
CS
DATA OUTPUT
CONVERSION
SLEEP
SLEEP
TEST EOC
TEST EOC
DATA OUTPUT
Hi-Z
Hi-Z
Hi-Z
CONVERSION
2415 F09
MSB
SIG
BIT 8
BIT 27
BIT 9
BIT 28
BIT 29
BIT 30
EOC
BIT 31
BIT 0
EOC
Hi-Z
TEST EOC
V
CC
F
O
REF
+
REF
–
SCK
IN
+
IN
–
GND
SDO
CS
2
14
3
4
13
5
6
12
1, 7, 8, 9, 10, 15, 16
11
REFERENCE
VOLTAGE
0.1V TO V
CC
ANALOG INPUT RANGE
–0.5V
REF
TO 0.5V
REF
3-WIRE
SPI INTERFACE
1
μ
F
2.7V TO 5.5V
LTC2415/
LTC2415-1
= 50Hz REJECTION (LTC2415)
= EXTERNAL OSCILLATOR
= 60Hz REJECTION (LTC2415)
= 50Hz/60Hz REJECTION (LTC2415-1)
V
CC
Since CS is tied LOW, the end-of-conversion (EOC) can be
continuously monitored at the SDO pin during the convert
and sleep states. EOC may be used as an interrupt to an
external controller indicating the conversion result is
ready. EOC = 1 while the conversion is in progress and
EOC=0 once the conversion enters the sleep state. On the
falling edge of EOC, the conversion result is loaded into an
internal static shift register. The device remains in the
sleep state until the first rising edge of SCK. Data is shifted
out the SDO pin on each falling edge of SCK enabling
external circuitry to latch data on the rising edge of SCK.
EOC can be latched on the first rising edge of SCK. On the
32nd falling edge of SCK, SDO goes HIGH (EOC=1)
indicating a new conversion has begun.
Internal Serial Clock, Single Cycle Operation
This timing mode uses an internal serial clock to shift out
the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 11.
In order to select the internal serial clock timing mode, the
serial clock pin (SCK) must be floating (Hi-Z) or pulled
HIGH prior to the falling edge of CS. The device will not
enter the internal serial clock mode if SCK is driven LOW
on the falling edge of CS. An internal weak pull-up resistor
is active on the SCK pin during the falling edge of CS;
therefore, the internal serial clock timing mode is auto-
matically selected if SCK is not externally driven.
The serial data output pin (SDO) is Hi-Z as long as CS is
HIGH. At any time during the conversion cycle, CS may be
pulled LOW in order to monitor the state of the converter.
Once CS is pulled LOW, SCK goes LOW and EOC is output
to the SDO pin. EOC = 1 while a conversion is in progress
and EOC = 0 if the device is in the sleep state.
When testing EOC, if the conversion is complete (EOC = 0),
the device will exit the sleep state and enter the data output
state if CS remains LOW. In order to prevent the device
from exiting the sleep state, CS must be pulled HIGH
before the first rising edge of SCK. In the internal SCK
timing mode, SCK goes HIGH and the device begins
outputting data at time t
EOCtest
after the falling edge of CS
(if EOC = 0) or t
EOCtest
after EOC goes LOW (if CS is LOW
during the falling edge of EOC). The value of t
EOCtest
is 23
μ
s
(LTC2415), 26
μ
s (LTC2415-1) if the device is using its
internal oscillator (F
0
= logic LOW or HIGH). If F
O
is driven
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC2415-1IGN | 24-Bit No Latency ADCs with Differential Input and Differential Reference |
| LTC2415CGN | 24-Bit No Latency ADCs with Differential Input and Differential Reference |
| LTC2415IGN | 24-Bit No Latency ADCs with Differential Input and Differential Reference |
| LTC2415 | 2-Channel Differential Input 24-Bit No Latency DS ADC |
| LTC2424 | 16-Bit 2.5-V to 3.3-V/3.3-V To 5-V Level Shifting Transceiver With 3-State Outputs 48-SSOP -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2415-1CGN#PBF | 功能描述:IC ADC 24BIT DIFFINPUT/REF16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| LTC2415-1CGN#TR | 功能描述:IC ADC 24BIT DIFFINPUT/REF16SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2415-1CGN#TRPBF | 功能描述:IC ADC 24BIT DIFFINPUT/REF16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2415-1IGN | 功能描述:IC ADC 24BIT DIFFINPUT/REF16SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2415-1IGN#PBF | 功能描述:IC ADC 24BIT DIFFINPUT/REF16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
發(fā)布緊急采購，3分鐘左右您將得到回復。