參數(shù)資料
型號(hào)： LTC2424
廠商： Linear Technology Corporation
英文描述： 16-Bit 2.5-V to 3.3-V/3.3-V To 5-V Level Shifting Transceiver With 3-State Outputs 48-SSOP -40 to 85
中文描述： 2路差分輸入24位ADC的無延遲局副局長
文件頁數(shù)： 30/36頁
文件大?。?/td> 409K
代理商： LTC2424
LTC2412
30
2412f
APPLICATIU
W
U
U
Input Bandwidth
The combined effect of the internal Sinc
4
digital filter and
of the analog and digital autocalibration circuits deter-
mines the LTC2412 input bandwidth. When the internal
oscillator is used with the notch set at 60Hz (F
O
= LOW),
the 3dB input bandwidth is 3.63Hz. When the internal
oscillator is used with the notch set at 50Hz (F
O
= HIGH),
the 3dB input bandwidth is 3.02Hz. If an external conver-
sion clock generator of frequency f
EOSC
is connected to the
F
O
pin, the 3dB input bandwidth is 0.236 10
–6
f
EOSC
.
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled very
accurately by a first order filter with the pole located at the
3dB frequency. When the internal oscillator is used, the
shape of the LTC2412 input bandwidth is shown in Fig-
ure31 for F
O
= LOW and F
O
= HIGH. When an external
oscillator of frequency f
EOSC
is used, the shape of the
LTC2412 input bandwidth can be derived from Figure31,
F
O
= LOW curve in which the horizontal axis is scaled by
f
EOSC
/153600.
The conversion noise (800nV
RMS
typical for V
REF
= 5V)
can be modeled by a white noise source connected to a
noise free converter. The noise spectral density is
62.75nV/
√
Hz for an infinite bandwidth source and
86.1nV/
√
Hz for a single 0.5MHz pole source. From these
numbers, it is clear that particular attention must be given
to the design of external amplification circuits. Such
circuits face the simultaneous requirements of very low
bandwidth (just a few Hz) in order to reduce the output
referred noise and relatively high bandwidth (at least
500kHz) necessary to drive the input switched-capacitor
network. A possible solution is a high gain, low bandwidth
amplifier stage followed by a high bandwidth unity-gain
buffer.
When external amplifiers are driving the LTC2412, the
ADC input referred system noise calculation can be simpli-
fied by Figure 32. The noise of an amplifier driving the
LTC2412 input pin can be modeled as a band limited white
noise source. Its bandwidth can be approximated by the
bandwidth of a single pole lowpass filter with a corner
frequency f
i
. The amplifier noise spectral density is n
i
.
From Figure32, using f
i
as the x-axis selector, we can find
on the y-axis the noise equivalent bandwidth freq
i
of the
Figure 29. Resolution (Noise
RMS
≤
1LSB)
vs Output Data Rate and Reference Voltage
Figure 30. Resolution (INL
MAX
≤
1LSB)
vs Output Data Rate and Reference Voltage
Figure 31. Input Signal Bandwidth
Using the Internal Oscillator
OUTPUT DATA RATE (READINGS/SEC)
0
10 20 30 40 50 60 70 80 90 100
R
2412 F29
24
23
22
21
20
19
18
17
16
15
14
13
12
V
REF
= 5V
V
= 5V
REF
= GND
V
INCM
= 2.5V
V
IN
F
O
= EXTERNAL OSCILLATOR
T
= 25
°
C
RESOLUTION = LOG
2
(V
REF
/NOISE
RMS
)
V
REF
= 2.5V
OUTPUT DATA RATE (READINGS/SEC)
0
10 20 30 40 50 60 70 80 90 100
R
2412 F30
22
20
18
16
14
12
10
8
T
A
= 25
°
C
V
CC
= 5V
REF
–
= GND
V
= 0.5 REF
+
–0.5V V
REF
< V
IN
< 0.5 V
REF
F
O
= EXTERNAL OSCILLATOR
V
REF
= 2.5V
V
REF
= 5V
RESOLUTION =
LOG
2
(V
REF
/INL
MAX
)
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
I
2412 F31
0.0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
–5.5
–6.0
F
O
= HIGH
F
O
= LOW
相關(guān)PDF資料
PDF描述
LTC2424C 16-Bit 2.5-V to 3.3-V/3.3-V To 5-V Level Shifting Transceiver With 3-State Outputs 54-BGA MICROSTAR JUNIOR -40 to 85
LTC2424CG 16-Bit 2.5-V to 3.3-V/3.3-V To 5-V Level Shifting Transceiver With 3-State Outputs 56-BGA MICROSTAR JUNIOR -40 to 85
LTC2424I 16-Bit 2.5-V to 3.3-V/3.3-V To 5-V Level Shifting Transceiver With 3-State Outputs 54-BGA MICROSTAR JUNIOR -40 to 85
LTC2424IG 16-Bit 2.5-V to 3.3-V/3.3-V To 5-V Level Shifting Transceiver With 3-State Outputs 48-TSSOP -40 to 85
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