參數(shù)資料
型號: LTC2435-1CGN
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 20-Bit No Latency ADCs with Differential Input and Differential Reference
中文描述: 1-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16
封裝: 0.150 INCH, PLASTIC, SSOP-16
文件頁數(shù): 38/40頁
文件大?。?/td> 463K
代理商: LTC2435-1CGN
LTC2435/LTC2435-1
38
24351fa
APPLICATIU
W
U
U
Correlated Double Sampling with the
LTC2435/LTC2435-1
The Typical Application on the back page of this data sheet
shows the LTC2435/LTC2435-1 in a correlated double
sampling circuit that achieves a noise floor of under
100nV. In this scheme, the polarity of the bridge is
alternated every other sample and the result is the average
of a pair of samples of opposite sign. This technique has
the benefit of canceling any fixed DC error components in
the bridge, amplifiers and the converter, as these will
alternate in polarity relative to the signal. Offset voltages
and currents, thermocouple voltages at junctions of dis-
similar metals and the lower frequency components of 1/f
noise are virtually eliminated.
The LTC2435/LTC2435-1 have the virtue of being able to
digitize an input voltage that is outside the range defined
by the reference, thereby providing a simple means to
implement a ratiometric example of correlated double
sampling.
This circuit uses a bipolar amplifier (LT1219—U1 and U2)
that has neither the lowest noise nor the highest gain. It
does, however, have an output stage that can effectively
suppress the conversion spikes from the LTC2435/
LTC2435-1. The LT1219 is a C-Load
TM
stable amplifier
that, by design, needs at least 0.1
μ
F output capacitance to
remain stable. The 0.1
μ
F ceramic capacitors at the out-
puts (C1 and C2) should be placed and routed to minimize
lead inductance or their effectiveness in preventing enve-
lope detection in the input stage will be reduced. Alterna-
tively, several smaller capacitors could be placed so that
lead inductance is further reduced. This is a consideration
because the frequency content of the conversion spikes
extends to 50MHz or more. The output impedance of
most op amps increases dramatically with frequency but
the effective output impedance of the LT1219 remains
C-Load is a trademark of Linear Technology Corporation.
low, determined by the ESR and inductance of the capaci-
tors above 10MHz. The conversion spikes that remain at
the output of other bipolar amplifiers pass through the
feedback network and often overdrive the input of the
amplifier, producing envelope detection. RFI may also be
present on the signal lines from the bridge; C3 and C4
provide RFI suppression at the signal input, as well as
suppressing transient voltages during bridge commuta-
tion.
The wideband noise density of the LT1219 is 33nV/
Hz,
seemingly much noisier than the lowest noise amplifiers.
However, in the region just below the 1/f corner that is not
well suppressed by the correlated double sampling, the
average noise density is similar to the noise density of
many low noise amplifiers. If the amplifier is rolled off
below about 1500Hz, the total noise bandwidth is deter-
mined by the converter’s Sinc
4
filter at about 12Hz. The
use of correlated double sampling involves averaging
even numbers of samples; hence, in this situation, two
samples would be averaged to give an input-referred
noise level of about 100nV
RMS
.
Level shift transistors Q4 and Q5 are included to allow
excitation voltages up to the maximum recommended for
the bridge. In the case shown, if a 10V supply is used, the
excitation voltage to the bridge is 8.5V and the outputs of
the bridge are above the supply rail of the ADC. U1 and U2
are also used to produce a level shift to bring the outputs
within the input range of the converter. This instrumenta-
tion amplifier topology does not require well-matched
resistors in order to produce good CMRR. However, the
use of R2 requires that R3 and R6 match well, as the
common mode gain is approximately –12dB. If the bridge
is composed of four equal 350
resistors, the differential
component associated with mismatch of R3 and R6 is
nearly constant with either polarity of excitation and, as
with offset, its contribution is canceled.
相關(guān)PDF資料
PDF描述
LTC2435CGN 20-Bit No Latency ADCs with Differential Input and Differential Reference
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LTC2436-1 2-Channel Differential Input 16-Bit No Latency DS ADC
LTC2436-1CGN 2-Channel Differential Input 16-Bit No Latency DS ADC
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