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參數(shù)資料
| 型號： | LTC2435-1IGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 20-Bit No Latency ADCs with Differential Input and Differential Reference |
| 中文描述： | 1-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 18/40頁 |
| 文件大小： | 463K |
| 代理商： | LTC2435-1IGN |
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LTC2435/LTC2435-1
18
24351fa
Serial Clock Input/Output (SCK)
The serial clock signal present on SCK (Pin 13) is used to
synchronize the data transfer. Each bit of data is shifted out
the SDO pin on the falling edge of the serial clock.
In the Internal SCK mode of operation, the SCK pin is an
output and the LTC2435/LTC2435-1 create their own se-
rial clock by dividing the internal conversion clock by 8. In
the External SCK mode of operation, the SCK pin is used
as input. The internal or external SCK mode is selected on
power-up and then reselected every time a HIGH-to-LOW
transition is detected at the CS pin. If SCK is HIGH or float-
ing at power-up or during this transition, the converter
enters the internal SCK mode. If SCK is LOW at power-up
or during this transition, the converter enters the external
SCK mode.
Serial Data Output (SDO)
The serial data output pin, SDO (Pin 12), provides the
result of the last conversion as a serial bit stream (MSB
first) during the data output state. In addition, the SDO pin
is used as an end of conversion indicator during the
conversion and sleep states.
When CS (Pin 11) is HIGH, the SDO driver is switched to
a high impedance state. This allows sharing the serial
interface with other devices. If CS is LOW during the
convert or sleep state, SDO will output EOC. If CS is LOW
during the conversion phase, the EOC bit appears HIGH on
the SDO pin. Once the conversion is complete, EOC goes
LOW.
Chip Select Input (CS)
The active LOW chip select, CS (Pin 11), is used to test the
conversion status and to enable the data output transfer as
described in the previous sections.
In addition, the CS signal can be used to trigger a new
conversion cycle before the entire serial data transfer has
been completed. The LTC2435/LTC2435-1 will abort any
serial data transfer in progress and start a new conversion
cycle anytime a LOW-to-HIGH transition is detected at the
CS pin after the converter has entered the data output state
(i.e., after the first rising edge of SCK occurs with
CS = LOW).
Finally, CS can be used to control the free-running modes
of operation, see Serial Interface Timing Modes section.
Grounding CS will force the ADC to continuously convert
at the maximum output rate selected by F
O
.
SERIAL INTERFACE TIMING MODES
The LTC2435/LTC2435-1 3-wire interface is SPI and
MICROWIRE compatible. This interface offers several
flexible modes of operation. These include internal/exter-
nal serial clock, 2- or 3-wire I/O, single cycle conversion
and autostart. The following sections describe each of
these serial interface timing modes in detail. In all these
cases, the converter can use the internal oscillator (F
O
=
LOW or F
O
= HIGH) or an external oscillator connected to
the F
O
pin. Refer to Table 4 for a summary.
Table 4. LTC2435/LTC2435-1 Interface Timing Modes
Conversion
Cycle
Control
CS and SCK
SCK
CS
↓
Continuous
Data
Output
Control
CS and SCK
SCK
CS
↓
Internal
Connection
and
Waveforms
Figures 8, 9
Figure 10
Figures 11, 12
Figure 13
SCK
Source
External
External
Internal
Internal
Configuration
External SCK, Single Cycle Conversion
External SCK, 2-Wire I/O
Internal SCK, Single Cycle Conversion
Internal SCK, 2-Wire I/O, Continuous Conversion
APPLICATIU
W
U
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