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參數(shù)資料
| 型號： | LTC2435CGN#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 10/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC DIFF I/REF 20BIT 16-SSOP |
| 標準包裝： | 2,500 |
| 位數(shù)： | 20 |
| 采樣率（每秒）： | 15 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉換器數(shù)目： | 2 |
| 功率耗散（最大）： | 1mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 16-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
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LTC2435/LTC2435-1
18
24351fc
For more information www.linear.com/LTC2435
applicaTions inForMaTion
Serial Clock Input/Output (SCK)
The serial clock signal present on SCK (Pin 13) is used to
synchronize the data transfer. Each bit of data is shifted
out the SDO pin on the falling edge of the serial clock.
In the Internal SCK mode of operation, the SCK pin is
an output and the LTC2435/LTC2435-1 create their own
serial clock by dividing the internal conversion clock by
8. In the External SCK mode of operation, the SCK pin
is used as input. The internal or external SCK mode is
selected on power-up and then reselected every time a
HIGH-to-LOW transition is detected at the CS pin. If SCK
is HIGH or floating at power-up or during this transition,
the converter enters the internal SCK mode. If SCK is LOW
at power-up or during this transition, the converter enters
the external SCK mode.
Serial Data Output (SDO)
The serial data output pin, SDO (Pin 12), provides the
result of the last conversion as a serial bit stream (MSB
first) during the data output state. In addition, the SDO
pin is used as an end of conversion indicator during the
conversion and sleep states.
When CS (Pin 11) is HIGH, the SDO driver is switched
to a high impedance state. This allows sharing the serial
interfacewithotherdevices.IfCSisLOWduringtheconvert
or sleep state, SDO will output EOC. If CS is LOW during
the conversion phase, the EOC bit appears HIGH on the
SDOpin.Oncetheconversioniscomplete,EOCgoesLOW.
Chip Select Input (CS)
The active LOW chip select, CS (Pin 11), is used to test the
conversion status and to enable the data output transfer
as described in the previous sections.
In addition, the CS signal can be used to trigger a new
conversion cycle before the entire serial data transfer has
been completed. The LTC2435/LTC2435-1 will abort any
serial data transfer in progress and start a new conver-
sion cycle anytime a LOW-to-HIGH transition is detected
at the CS pin after the converter has entered the data
output state (i.e., after the first rising edge of SCK occurs
with CS = LOW).
Finally, CS can be used to control the free-running modes
of operation, see Serial Interface Timing Modes section.
Grounding CS will force the ADC to continuously convert
at the maximum output rate selected by FO.
SERIAL INTERFACE TIMING MODES
The LTC2435/LTC2435-1 3-wire interface is SPI and MI-
CROWIREcompatible.Thisinterfaceoffersseveralflexible
modes of operation. These include internal/external serial
clock, 2- or 3-wire I/O, single cycle conversion and auto-
start. The following sections describe each of these serial
interface timing modes in detail. In all these cases, the
converter can use the internal oscillator (FO = LOW or FO
= HIGH) or an external oscillator connected to the FO pin.
Refer to Table 4 for a summary.
Table 4. LTC2435/LTC2435-1 Interface Timing Modes
Configuration
SCK
Source
Conversion
Cycle
Control
Data
Output
Control
Connection
and
Waveforms
External SCK, Single Cycle Conversion
External
CS and SCK
Figures 8, 9
External SCK, 2-Wire I/O
External
SCK
Figure 10
Internal SCK, Single Cycle Conversion
Internal
CS
↓
CS
↓
Figures 11, 12
Internal SCK, 2-Wire I/O, Continuous Conversion
Internal
Continuous
Internal
Figure 13
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