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參數(shù)資料
| 型號： | LTC2435CGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 20-Bit No Latency ADCs with Differential Input and Differential Reference |
| 中文描述： | 1-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 28/40頁 |
| 文件大小： | 463K |
| 代理商： | LTC2435CGN |
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LTC2435/LTC2435-1
28
24351fa
APPLICATIU
W
U
U
Figure 21. +FS Error vs R
SOURCE
at REF
+
or REF
–
(Small C
IN
)
Figure 22. –FS Error vs R
SOURCE
at REF
+
or REF
–
(Small C
IN
)
gain errors will be insignificant (about 1% of their respec-
tive values over the entire temperature and voltage range).
Even for the most stringent applications, a one-time
calibration operation may be sufficient.
In addition to the input sampling charge, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (
±
10nA max), results
in a small offset shift. A 100
source resistance will create
a 0.1
μ
V typical and 1
μ
V maximum offset voltage.
Reference Current
In a similar fashion, the LTC2435/LTC2435-1 sample the
differential reference pins REF
+
and REF
–
transferring
small amount of charge to and from the external driving
circuits thus producing a dynamic reference current. This
current does not change the converter offset, but it may
degrade the gain and INL performance. The effect of this
current can be analyzed in the same two distinct situa-
tions.
For relatively small values of the external reference capaci-
tors (C
REF
< 0.01
μ
F), the voltage on the sampling capacitor
settles almost completely and relatively large values for
the source impedance result in only small errors. Such
values for C
REF
will deteriorate the converter offset and
gain performance without significant benefits of reference
filtering and the user is advised to avoid them.
Larger values of reference capacitors (C
REF
> 0.01
μ
F) may
be required as reference filters in certain configurations.
Such capacitors will average the reference sampling charge
and the external source resistance will see a quasi con-
stant reference differential impedance. For the LTC2435,
when F
O
= LOW (internal oscillator and 60Hz notch), the
typical differential reference resistance is 15.6M
which
will generate a +FS gain error of approximately 0.032ppm
for each ohm of source resistance driving REF
+
or REF
–
.
When F
O
= HIGH (internal oscillator and 50Hz notch), the
typical differential reference resistance is 18.7M
which
will generate a +FS gain error of approximately 0.027ppm
for each ohm of source resistance driving REF
+
or REF
–
.
For the LTC2435-1, the typical differential reference resis-
tance is 17.1M
which will generate a +FS gain error of
approximately 0.029ppm for each ohm of source resis-
tance driving REF
+
or REF
–
. When F
O
is driven by an
external oscillator with a frequency f
EOSC
(external conver-
sion clock operation), the typical differential reference
resistance is 2.4 10
12
/f
EOSC
and each ohm of source
resistance driving REF
+
or REF
–
will result in
0.21 10
–6
f
EOSC
ppm +FS gain error. The effect of the
source resistance on the two reference pins is additive
with respect to this gain error. The typical +FS and –FS
errors for various combinations of source resistance seen
by the REF
+
and REF
–
pins and external capacitance C
REF
connected to these pins are shown in Figures 21, 22, 23
and 24.
R
SOURCE
(
)
1
+
100
90
80
70
60
50
40
30
20
10
0
–10
10000
2435 F21
10
100
1000
100000
C
IN
= 0pF
C
IN
= 0.01
μ
F
V
= 5V
V
CC
= 5V
V
REF–
= GND
V
IN+
= 3.75V
V
IN–
= 1.25V
F
O
= GND
T
A
= 25
°
C
C
IN
= 100pF
C
IN
= 0.001
μ
F
R
SOURCE
(
)
1
–
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
10000
2435 F22
10
100
1000
100000
C
IN
= 0pF
C
IN
= 0.01
μ
F
V
= 5V
V
CC
= 5V
V
REF–
= GND
V
IN+
= 1.25V
V
IN–
= 3.75V
F
O
= GND
T
A
= 25
°
C
C
IN
= 0.001
μ
F
C
IN
= 100pF
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