參數(shù)資料
型號(hào): LTC2480
廠商: Linear Technology Corporation
英文描述: 16-Bit ADC with Easy Drive
中文描述: 16位ADC的易道
文件頁(yè)數(shù): 5/40頁(yè)
文件大?。?/td> 535K
代理商: LTC2480
5
LTC2480
2480f
SYMBOL
f
EOSC
t
HEO
t
LEO
t
CONV_1
PARAMETER
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time for 1x Speed Mode
CONDITIONS
(Note 15)
MIN
10
0.125
0.125
157.2
131.0
144.1
TYP
MAX
4000
100
100
163.5
136.3
149.9
UNITS
kHz
μ
s
μ
s
ms
ms
ms
ms
ms
ms
ms
ms
kHz
kHz
%
kHz
ns
ns
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
50Hz Mode
60Hz Mode
Simultaneous 50Hz/60Hz Mode
External Oscillator
50Hz Mode
60Hz Mode
Simultaneous 50Hz/60Hz Mode
External Oscillator
Internal Oscillator (Note 10)
External Oscillator (Notes 10, 11)
(Note 10)
(Note 10)
(Note 10)
(Note 10)
Internal Oscillator (Notes 10, 12)
External Oscillator (Notes 10, 11)
(Note 10)
160.3
133.6
146.9
41036/f
EOSC
(in kHz)
80.3
66.9
73.6
20556/f
EOSC
(in kHz)
38.4
f
EOSC
/8
t
CONV_2
Conversion Time for 2x Speed Mode
78.7
65.6
72.2
81.9
68.2
75.1
f
ISCK
Internal SCK Frequency
D
ISCK
f
ESCK
t
LESCK
t
HESCK
t
DOUT_ISCK
Internal SCK Duty Cycle
External SCK Frequency Range
External SCK Low Period
External SCK High Period
Internal SCK 24-Bit Data Output Time
45
55
4000
125
125
0.61
0.625
0.64
192/f
EOSC
(in kHz)
24/f
ESCK
(in kHz)
t
DOUT_ESCK
t
1
t
2
t
3
t
4
t
KQMAX
t
KQMIN
t
5
t
6
t
7
t
8
External SCK 24-Bit Data Output Time
CS
to SDO Low
CS
to SDO High Z
CS
to SCK
CS
to SCK
SCK
to SDO Valid
SDO Hold After SCK
SCK Set-Up Before CS
SCK Hold After CS
SDI Setup Before SCK
SDI Hold After SCK
0
0
0
200
200
200
Internal SCK Mode
External SCK Mode
50
200
(Note 5)
15
50
50
(Note 5)
(Note 5)
100
100
The
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25
°
C. (Note 3)
TI I G CHARACTERISTICS
W
U
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2:
All voltage values are with respect to GND.
Note 3:
V
CC
= 2.7V to 5.5V unless otherwise specified.
V
REFCM
= V
REF
/2, FS = 0.5V
REF
/GAIN
V
IN
= IN
+
– IN
, V
IN(CM)
= (IN
+
+ IN
)/2
Note 4:
Use internal conversion clock or external conversion clock source
with f
EOSC
= 307.2kHz unless otherwise specified.
Note 5:
Guaranteed by design, not subject to test.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7:
50Hz mode (internal oscillator) or f
EOSC
= 256kHz
±
2% (external
oscillator).
Note 8:
60Hz mode (internal oscillator) or f
EOSC
= 307.2kHz
±
2% (external
oscillator).
Note 9:
Simultaneous 50Hz/60Hz mode (internal oscillator) or f
EOSC
=
280kHz
±
2% (external oscillator).
Note 10:
The SCK can be configured in external SCK mode or internal SCK
mode. In external SCK mode, the SCK pin is used as digital input and the
driving clock is f
ESCK
. In internal SCK mode, the SCK pin is used as digital
output and the output clock signal during the data output is f
ISCK
.
Note 11:
The external oscillator is connected to the F
O
pin. The external
oscillator frequency, f
EOSC
, is expressed in kHz.
Note 12:
The converter uses the internal oscillator.
Note 13:
The output noise includes the contribution of the internal
calibration operations.
Note 14:
Guaranteed by design and test correlation.
Note 15:
Refer to Applications Information section for performance vs
data rate graphs.
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