參數(shù)資料
型號(hào): LTC2486IDE#TRPBF
廠商: Linear Technology
文件頁數(shù): 22/36頁
文件大?。?/td> 0K
描述: IC ADC 16BIT W/PGA 14-DFN
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 15
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 800µW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 14-DFN-EP(4x3)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個(gè)單端,雙極;2 個(gè)差分,雙極
配用: DC1009A-C-ND - BOARD DELTA SIGMA ADC LTC2486
LTC2486
29
2486fd
APPLICATIONS INFORMATION
A 1V difference in between common mode input and com-
mon mode reference results in a 6.7ppm INL error for every
100Ω of reference resistance.
In addition to the reference sampling charge, the reference
ESD protection diodes have a temperature dependent leak-
age current. This leakage current, nominally 1nA (±10nA
max) results in a small gain error. A 100Ω reference
resistance will create a 0.5μV full scale error.
Normal Mode Rejection and Anti-aliasing
One of the advantages delta-sigma ADCs offer over
conventional ADCs is on-chip digital ltering. Combined
with a large oversample ratio, the LTC2486 signicantly
simplies anti-aliasing lter requirements. Additionally,
the input current cancellation feature allows external low
pass ltering without degrading the DC performance of
the device.
The SINC4 digital lter provides excellent normal mode
rejection at all frequencies except DC and integer multiples
of the modulator sampling frequency (fS) (see Figures
18 and 19). The modulator sampling frequency is fS =
15,360Hz while operating with its internal oscillator and
fS = FEOSC/20 when operating with an external oscillator
of frequency FEOSC.
When using the internal oscillator, the LTC2486 is designed
to reject line frequencies. As shown in Figure 20, rejec-
tion nulls occur at multiples of frequency fN, where fN is
determined by the input control bits FA and FB (fN = 50Hz
or 60Hz or 55Hz for simultaneous rejection). Multiples of
the modulator sampling rate (fS = fN 256) only reject noise
to 15dB (see Figure 21); if noise sources are present at
these frequencies anti-aliasing will reduce their effects.
Figure 18. Input Normal Mode Rejection, Internal Oscillator
and 50Hz Rejection Mode
Figure 19. Input Normal Mode Rejection, Internal Oscillator
and 60Hz Rejection Mode
Figure 20. Input Normal Mode Rejection at DC
Figure 21. Input Normal Mode Rejection at fS = 256 fN
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0fS 2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS10fS11fS12fS
INPUT
NORMAL
MODE
REJECTION
(dB)
2486 F18
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0fS
INPUT
NORMAL
MODE
REJECTION
(dB)
2486 F19
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS 10fS
INPUT SIGNAL FREQUENCY (Hz)
INPUT
NORMAL
MODE
REJECTION
(dB)
2486 F20
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
fN
0
2fN 3fN 4fN 5fN 6fN 7fN 8fN
fN = fEOSC/5120
INPUT SIGNAL FREQUENCY (Hz)
250fN 252fN 254fN 256fN 258fN 260fN 262fN
INPUT
NORMAL
MODE
REJECTION
(dB)
2486 F21
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
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