參數(shù)資料
型號： LTC2487IDETRPBF
廠商： Linear Technology Corporation
英文描述： 16-Bit 2-/4-Channel ADC with PGA, Easy Drive and I2C Interface
中文描述： 16位2-/4-Channel型ADC PGA巡回賽，輕松驅(qū)動和I2C接口
文件頁數(shù)： 12/32頁
文件大?。?/td> 612K
代理商： LTC2487IDETRPBF
LTC2487
2487fa
CONVERTER OPERATION
Converter Operation Cycle
The LTC2487 is a multichannel, low power, delta-sigma,
analog-to-digital converter with a 2-wire, I
2
C interface.
Its operation is made up of four states (see Figure 1).
The converter operating cycle begins with the conver-
sion, followed by the sleep state, and ends with the data
input/output cycle.
Initially, at power-up, the LTC2487 performs a conversion.
Once the conversion is complete, the device enters the
sleep state. While in the sleep state, power consumption is
reduced by two orders of magnitude. The part remains in
the sleep state as long it is not addressed for a read/write
operation. The conversion result is held indefinitely in a
static shift register while the part is in the sleep state.
The device will not acknowledge an external request dur-
ing the conversion state. After a conversion is finished,
the device is ready to accept a read/write request. Once
the LTC2487 is addressed for a read operation, the device
begins outputting the conversion result under the control
of the serial clock (SCL). There is no latency in the conver-
sion result. The data output is 24 bits long and contains a
16-bit plus sign conversion result. Data is updated on the
falling edges of SCL allowing the user to reliably latch data
on the rising edge of SCL. A new conversion is initiated
by a stop condition following a valid write operation or an
incomplete read operation. The conversion automatically
begins at the conclusion of a complete read cycle (all 24
bits read out of the device).
Ease of Use
The LTC2487 data output has no latency, filter settling
delay, or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog inputs is straightforward. Each conver-
sion, immediately following a newly selected input or
mode, is valid and accurate to the full specifications of
the device.
applicaTions inForMaTion
Figure 1. State Transition Table
The LTC2487 automatically performs offset and full-scale
calibration every conversion cycle independent of the input
channel selected. This calibration is transparent to the user
and has no effect on the operation cycle described above.
The advantage of continuous calibration is extreme stability
of offset and full-scale readings with respect to time, supply
voltage variation, input channel, and temperature drift.
Easy Drive Input Current Cancellation
The LTC2487 combines a high precision, delta-sigma ADC
with an automatic, differential, input current cancellation
front end. A proprietary front end passive sampling network
transparently removes the differential input current. This
enables external RC networks and high impedance sen-
sors to directly interface to the LTC2487 without external
CONVERSION
SLEEP
2487 F01
YES
NO
ACKNOWLEDGE
YES
NO
STOP
OR READ
24 BITS
DATA OUTPUT/INPUT
POWER-ON RESET
DEFAULT CONFIGURATION:
IN
+
= CH0, IN
–
= CH1
50Hz/60Hz REJECTION
1X OUTPUT, GAIN = 1
相關(guān)PDF資料
PDF描述
LTC2489IDETRPBF 16-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface
LTC2489 16-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface
LTC2489CDEPBF 16-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface
LTC2489CDETRPBF 16-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface
LTC2489IDEPBF 16-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface
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