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參數(shù)資料
| 型號： | LTC2489CDETRPBF |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 16-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface |
| 中文描述： | 16位2-/4-Channel ADC，具有易于驅(qū)動的輸入電流取消和I2C接口 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大?。?/td> | 341K |
| 代理商： | LTC2489CDETRPBF |
LTC2489
17
2489f
zero, the common mode input current (I
IN+
+ I
IN–
)/2 is
proportional to the difference between the common mode
input voltage (V
IN(CM)
) and the common mode reference
voltage (V
REF(CM)
).
In applications where the input common mode voltage is
equal to the reference common mode voltage, as in the
case of a balanced bridge, both the differential and com-
mon mode input current are zero. The accuracy of the
converter is not compromised by settling errors.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between V
IN(CM)
and V
REF(CM)
. For a reference
common mode voltage of 2.5V and an input common
mode of 1.5V, the common mode input current is ap-
proximately 0.74μA. This common mode input current
does not degrade the accuracy if the source impedances
tied to IN
+
and IN
–
are matched. Mismatches in source
impedance lead to a fixed offset error but do not effect
the linearity or full-scale reading. A 1% mismatch in a 1k
source resistance leads to a 74μV shift in offset voltage.
In applications where the common mode input voltage
varies as a function of the input signal level (single-ended
type sensors), the common mode input current varies
proportionally with input voltage. For the case of balanced
input impedances, the common mode input current effects
are rejected by the large CMRR of the LTC2489, leading
to little degradation in accuracy. Mismatches in source
impedances lead to gain errors proportional to the dif-
ference between the common mode input and common
mode reference. 1% mismatches in 1k source resistances
lead to gain errors on the order of 15ppm. Based on the
stability of the internal sampling capacitors and the ac-
curacy of the internal oscillator, a one-time calibration will
remove this error.
In addition to the input sampling current, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (±10nA max), results
in a small offset shift. A 1k source resistance will create a
1μV typical and a 10μV maximum offset voltage.
Reference Current
Similar to the analog inputs, the LTC2489 samples the
differential reference pins (REF
+
and REF
–
) transferring
small amounts of charge to and from these pins, thus
producing a dynamic reference current. If incomplete set-
tling occurs (as a function the reference source resistance
and reference bypass capacitance) linearity and gain errors
are introduced.
For relatively small values of external reference capacitance
(C
REF
< 1nF), the voltage on the sampling capacitor settles
for reference impedances of many k
Ω
(if C
REF
= 100pF up
to 10k
Ω
will not degrade the performance) (see Figures
10 and 11).
APPLICATIONS INFORMATION
Figure 10. +FS Error vs R
SOURCE
at V
REF
(Small C
REF
)
Figure 11. –FS Error vs R
SOURCE
at V
REF
(Small C
REF
)
R
SOURCE
(
Ω
)
0
+
50
70
90
10k
2489 F10
30
10
40
60
80
20
0
–10
10
100
1k
100k
V
CC
= 5V
V
= 5V
V
REF
= 3.75V
V
IN–
= 1.25V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 0.001
μ
F
REF
= 100pF
C
REF
= 0pF
R
SOURCE
(
Ω
)
0
–
–30
–10
10
10k
2489 F11
–50
–70
–40
–20
0
–60
–80
–90
10
100
1k
100k
V
CC
= 5V
V
= 5V
V
REF
= 1.25V
V
IN–
= 3.75V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 0.001
μ
F
REF
= 100pF
C
REF
= 0pF
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