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參數(shù)資料
| 型號： | LTC2493IDEPBF |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 24-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface |
| 中文描述： | 24位2-/4-Channel ADC，具有易于驅動的輸入電流取消和I2C接口 |
| 文件頁數(shù)： | 16/32頁 |
| 文件大小： | 588K |
| 代理商： | LTC2493IDEPBF |
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LTC2493
2493fa
DATA OUTPUT FORMAT
The output register contains the last conversion result.
After each conversion is completed, the device automati-
cally enters the sleep state where the supply current is
reduced to 1μA. When the LTC2493 is addressed for a read
operation, it acknowledges (by pulling SDA low) and acts
as a transmitter. The master/receiver can read up to four
bytes from the LTC2493. After a complete read operation
(4 bytes), a new conversion is initiated. The device will
NAK subsequent read operations while a conversion is
being performed.
The data output stream is 32 bits long and is shifted out
on the falling edges of SCL (see Figure 3a). The first bit
is the conversion result sign bit (SIG) (see Tables 1 and
2). This bit is high if V
IN
≥ 0 and low if V
IN
< 0 (where V
IN
corresponds to the selected input signal IN
+
– IN
–
). The
second bit is the most significant bit (MSB) of the result.
The first two bits (SIG and MSB) can be used to indicate
over and under range conditions (see Table 2). If both bits
are HIGH, the differential input voltage is equal to or above
+FS. If both bits are set low, the input voltage is below –FS.
The function of these bits is summarized in Table 2. The
24 bits following the MSB bit are the conversion result in
Table 1. Output Data Format
Differential Input Voltage
V
IN
*
V
IN
* ≥ FS**
FS** – 1LSB
0.5 FS**
0.5 FS** – 1LSB
0
–1LSB
–0.5 FS**
–0.5 FS** – 1LSB
–FS**
V
IN
* < –FS**
*The differential input voltage V
= IN
+
– IN
–
. **The full-scale voltage FS = 0.5 V
.
*** Sub LSBs are below the 24-bit level. They may be included in averaging, or discarded without loss of resolution.
Bit 31
SIG
1
1
1
1
1
0
0
0
0
0
Bit 30
MSB
1
0
0
0
0
1
1
1
1
0
Bit 29
0
1
1
0
0
1
1
0
0
1
Bit 28
0
1
0
1
0
1
0
1
0
1
Bit 27
…
Bit 6
LSB
0
1
0
1
0
1
0
1
0
1
Bits 5-0
Sub LSBs***
00000
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
XXXXX
11111
0
1
0
1
0
1
0
1
0
1
…
…
…
…
…
…
…
…
…
…
binary two’s, complement format. The remaining six bits
are sub LSBs below the 24-bit level.
As long as the voltage on the selected input channels (IN
+
and IN
–
) remains between –0.3V and V
CC
+ 0.3V (absolute
maximum operating range) a conversion result is gener-
ated for any differential input voltage V
IN
from –FS = –0.5
V
REF
to +FS = 0.5 V
REF
. For differential input voltages
greater than +FS, the conversion result is clamped to the
value corresponding to +FS. For differential input voltages
below –FS, the conversion result is clamped to the value
–FS – 1LSB.
Table 2. LTC2493 Status Bits
Input Range
V
IN
≥ FS
0V ≤ V
IN
< FS
–FS ≤ V
IN
< 0V
V
IN
< –FS
Bit 31
SIG
1
1
0
0
Bit 30
MSB
1
0
1
0
INPUT DATA FORMAT
The serial input word to the LTC2493 is 13 bits long and
is written into the device input register in two 8-bit words.
applicaTions inForMaTion
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