參數(shù)資料
型號： LTC2602CMS8
廠商： LINEAR TECHNOLOGY CORP
元件分類： DAC
英文描述： Dual 16-/14-/12-Bit Rail-to-Rail DACs in 8-Lead MSOP
中文描述： SERIAL INPUT LOADING, 10 us SETTLING TIME, 16-BIT DAC, PDSO8
封裝： PLASTIC, MSOP-8
文件頁數(shù)： 4/16頁
文件大?。?/td> 346K
代理商： LTC2602CMS8
4
LTC2602/LTC2612/LTC2622
2602f
TYPICAL PERFOR U
(LTC2602)
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
INL vs Temperature
CODE
0
16384
32768
49152
65535
I
2602 G20
32
24
16
8
0
–8
–16
–24
–32
V
CC
= 5V
V
REF
= 4.096V
CODE
0
16384
32768
49152
65535
D
2602 G21
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
V
CC
= 5V
V
REF
= 4.096V
TEMPERATURE (
°
C)
–50
–30
–10
10
30
50
70
90
I
2602 G22
32
24
16
8
0
–8
–16
–24
–32
V
CC
= 5V
V
REF
= 4.096V
INL (POS)
INL (NEG)
TIW
range, otherwise specifications are at T
A
= 25
°
C. (See Figure 1) (Note 6)
The
G
denotes specifications which apply over the full operating temperature
Note 1:
Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2:
Linearity and monotonicity are defined from code k
L
to code
2
N
– 1, where N is the resolution and k
L
is given by k
L
= 0.016(2
N
/V
REF
),
rounded to the nearest whole code. For V
REF
= 4.096V and N = 16, k
L
=
256 and linearity is defined from code 256 to code 65,535.
Note 3:
Digital inputs at 0V or V
CC
.
Note 4:
DC crosstalk is measured with V
CC
= 5V and V
REF
= 4.096V, with
the measured DAC at midscale, unless otherwise noted.
Note 5:
R
L
= 2k
to GND or V
CC
at the output of the DAC not being tested.
Note 6:
Guaranteed by design and not production tested.
Note 7:
Inferred from measurement at code 256 (LTC2602), code 64
(LTC2612) or code 16 (LTC2622), and at fullscale.
Note 8:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped 1/4 scale to 3/4 scale
and 3/4 scate to 1/4 scale. Load is 2k in parallel with 200pF to GND.
Note 9:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped
±
LBS between half scale
and half scale –1. Load is 2k in parallel with 200pF to GND.
LTC2602/LTC2612/LTC2622
MIN
TYP
SYMBOL
V
CC
= 2.5V to 5.5V
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
10
PARAMETER
CONDITIONS
MAX
UNITS
SDI Valid to SCK Setup
SDI Valid to SCK Hold
SCK High Time
SCK Low Time
CS/LD Pulse Width
LSB SCK High to CS/LD High
CS/LD Low to SCK High
CS/LD High to SCK Positive Edge
SCK Frequency
G
4
4
9
9
ns
ns
ns
ns
ns
ns
ns
ns
G
G
G
G
10
7
7
7
G
G
G
50% Duty Cycle
G
50
MHz
相關(guān)PDF資料
PDF描述
LTC2602IMS8 Dual 16-/14-/12-Bit Rail-to-Rail DACs in 8-Lead MSOP
LTC2612 Dual 16-/14-/12-Bit Rail-to-Rail DACs in 8-Lead MSOP
LTC2622 18-Bit Universal Bus Driver With 3-State Outputs 56-TVSOP -40 to 85
LTC2622CMS8 18-Bit Universal Bus Driver With 3-State Outputs 56-SSOP -40 to 85
LTC2622IMS8 18-Bit Universal Bus Driver With 3-State Outputs 56-SSOP -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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