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參數(shù)資料
| 型號(hào)： | LTC2619CGN-1#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT R-R QUAD 16SSOP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 設(shè)置時(shí)間： | 9µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 750µW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 1351 (CN2011-ZH PDF) |
LTC2609/LTC2619/LTC2629
26091929fb
operation
during the Acknowledge clock pulse so that it remains a
stable LOW during the HIGH period of this clock pulse.
The LTC2609/LTC2619/LTC2629 respond to a write by a
master in this manner. The LTC2609/LTC2619/LTC2629
do not acknowledge a read (retains SDA HIGH during the
period of the Acknowledge clock pulse).
Chip Address
The state of CA0, CA1 and CA2 decides the slave address
of the part. The pins CA0, CA1 and CA2 can be each set
to any one of three states: VCC, GND or float. This results
in 27 selectable addresses for the part. The slave address
assignments are shown in Table 1.
In addition to the address selected by the address pins,
the parts also respond to a global address. This address
allows a common write to all LTC2609, LTC2619 and
LTC2629 parts to be accomplished with one 3-byte write
transaction on the I2C bus. The global address is a 7-bit
on-chip hardwired address and is not selectable by CA0,
CA1 and CA2.
The addresses corresponding to the states of CA0, CA1
and CA2 and the global address are shown in Table 1. The
maximumcapacitiveloadallowedontheaddresspins(CA0,
CA1 and CA2) is 10pF, as these pins are driven during
address detection to determine if they are floating.
Write Word Protocol
The master initiates communication with the LTC2609/
LTC2619/LTC2629withaSTARTconditionanda7-bitslave
address followed by the Write bit (W) = 0. The LTC2609/
LTC2619/LTC2629 acknowledges by pulling the SDA pin
low at the 9th clock if the 7-bit slave address matches the
address of the parts (set by CA0, CA1 and CA2) or the
global address. The master then transmits three bytes of
data. The LTC2609/LTC2619/LTC2629 acknowledges each
byte of data by pulling the SDA line low at the 9th clock of
eachdatabytetransmission.Afterreceivingthreecomplete
bytesofdata,theLTC2609/LTC2619/LTC2629executesthe
command specified in the 24-bit input word.
If more than three data bytes are transmitted after a valid
7-bitslaveaddress,theLTC2609/LTC2619/LTC2629donot
acknowledge the extra bytes of data (SDA is high during
the 9th clock).
The format of the three data bytes is shown in Figure 3.
The first byte of the input word consists of the 4-bit com-
mand and 4-bit DAC address. The next two bytes consist
of the 16-bit data word. The 16-bit data word consists of
the 16-, 14- or 12-bit input code, MSB to LSB, followed by
0, 2 or 4 don’t care bits (LTC2609, LTC2619 and LTC2629
respectively).AtypicalLTC2609writetransactionisshown
in Figure 4.
The command (C3-C0) and address (A3-A0) assignments
are shown in Table 2. The first four commands in the table
consist of write and update operations. A write operation
Table 1. Slave Address Map
CA2
CA1
CA0
SA6 SA5 SA4 SA3 SA2 SA1 SA0
GND
0
1
0
GND
FLOAT
0
1
0
1
GND
VCC
0
1
0
1
0
GND
FLOAT
GND
0
1
0
1
GND
FLOAT
0
1
0
GND
FLOAT
VCC
0
1
0
1
GND
VCC
GND
0
1
0
1
0
GND
VCC
FLOAT
0
1
0
1
GND
VCC
0
1
0
FLOAT
GND
0
1
0
1
FLOAT
GND
FLOAT
0
1
0
1
0
FLOAT
GND
VCC
0
1
0
1
FLOAT
GND
1
0
FLOAT
1
0
1
FLOAT
VCC
1
0
1
0
FLOAT
VCC
GND
1
0
1
FLOAT
VCC
FLOAT
1
0
1
0
FLOAT
VCC
1
0
1
0
1
VCC
GND
1
0
1
0
1
0
VCC
GND
FLOAT
1
0
1
0
1
VCC
GND
VCC
1
0
VCC
FLOAT
GND
1
0
1
VCC
FLOAT
1
0
1
0
VCC
FLOAT
VCC
1
0
1
VCC
GND
1
0
VCC
FLOAT
1
0
1
VCC
1
0
1
0
GLOBAL ADDRESS
1
0
1
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