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參數(shù)資料
| 型號： | LTC2621 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 18-Bit Universal Bus Driver With 3-State Outputs 56-TSSOP -40 to 85 |
| 中文描述： | 16/14/12軌到軌DAC的10引腳DFN |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 321K |
| 代理商： | LTC2621 |
13
LTC2601/LTC2611/LTC2621
2601f
The DAC is powered up when LDAC is taken low, indepen-
dent of the state of CS/LD.
If LDAC is low at the time CS/LD goes high, it inhibits any
software power-down command that was specified in the
input word.
Voltage Outputs
The rail-to-rail amplifier contained in these parts has
guaranteed load regulation when sourcing or sinking up to
15mA at 5V (7.5mA at 3V).
Load regulation is a measure of the amplifier’s ability to
maintain the rated voltage accuracy over a wide range of
load conditions. The measured change in output voltage
per milliampere of forced load current change is ex-
pressed in LSB/mA.
DC output impedance is equivalent to load regulation, and
may be derived from it by simply calculating a change in
units from LSB/mA to Ohms. The amplifier’s DC output
impedance is 0.05
when driving a load well away from
the rails.
When drawing a load current from either rail, the output
voltage headroom with respect to that rail is limited by the
25
typical channel resistance of the output devices;
e.g., when sinking 1mA, the minimum output voltage =
25
1mA = 25mV. See the graph Headroom at Rails vs
Output Current in the Typical Performance Characteris-
tics section.
The amplifier is stable driving capacitive loads of up to
1000pF.
Board Layout
The excellent load regulation of these devices is achieved
in part by keeping “signal” and “power” grounds sepa-
rated internally and by reducing shared internal resistance.
The GND pin functions both as the node to which the
reference and output voltages are referred and as a return
path for power currents in the device. Because of this,
careful thought should be given to the grounding scheme
and board layout in order to ensure rated performance.
The PC board should have separate areas for the analog and
digital sections of the circuit. This keeps digital signals away
from sensitive analog signals and facilitates the use of
separate digital and analog ground planes which have
minimal capacitive and resistive interaction with each other.
Digital and analog ground planes should be joined at only
one point, establishing a system star ground as close to
the device’s ground pin as possible. Ideally, the analog
ground plane should be located on the component side of
the board, and should be allowed to run under the part to
shield it from noise. Analog ground should be a continu-
ous and uninterrupted plane, except for necessary lead
pads and vias, with signal traces on another layer.
The GND pin of the part should be connected to analog
ground. Resistance from the GND pin to system star ground
should be as low as possible. Resistance here will add
directly to the effective DC output impedance of the device
(typically 0.05
). Note that the LTC2601/LTC2611/
LTC2621 are no more susceptible to these effects than other
parts of their type; on the contrary, they allow layout-based
performance improvements to shine rather than limiting
attainable performance with excessive internal resistance.
Rail-to-Rail Output Considerations
In any rail-to-rail voltage output device, the output is
limited to voltages within the supply range.
Since the analog output of the device cannot go below
ground, it may limit for the lowest codes as shown in
Figure 3b. Similarly, limiting can occur near full scale
when the REF pin is tied to V
CC
. If V
REF
= V
CC
and the DAC
full-scale error (FSE) is positive, the output for the highest
codes limits at V
CC
as shown in Figure 3c. No full-scale
limiting can occur if V
REF
is less than V
CC
– FSE.
Offset and linearity are defined and tested over the region
of the DAC transfer function where no output limiting can
occur.
OPERATIOU
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