CA2 (Pin 1): Chip Address Bit 2. Tie this pin to VCC
參數(shù)資料
型號: LTC2626IDD#PBF
廠商: Linear Technology
文件頁數(shù): 2/20頁
文件大?。?/td> 0K
描述: IC DAC 12BIT I2C V-OUT 10-DFN
標準包裝: 121
設置時間: 7µs
位數(shù): 12
數(shù)據(jù)接口: I²C
轉換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 810µW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤
供應商設備封裝: 10-DFN(3x3)
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
LTC2606/LTC2616/LTC2626
10
26061626fb
PIN FUNCTIONS
CA2 (Pin 1): Chip Address Bit 2. Tie this pin to VCC, GND
or leave it oating to select an I2C slave address for the
part (Table 1).
SDA (Pin 2): Serial Data Bidirectional Pin. Data is shifted
into the SDA pin and acknowledged by the SDA pin. This
pin is high impedance while data is shifted in. Open-drain
N-channel output during acknowledgment. SDA requires
a pull-up resistor or current source to VCC.
SCL (Pin 3): Serial Clock Input Pin. Data is shifted into
the SDA pin at the rising edges of the clock. This high
impedance pin requires a pull-up resistor or current
source to VCC.
CA0 (Pin 4): Chip Address Bit 0. Tie this pin to VCC, GND
or leave it oating to select an I2C slave address for the
part (Table 1).
CA1 (Pin 5): Chip Address Bit 1. Tie this pin to VCC, GND
or leave it oating to select an I2C slave address for the
part (Table 1).
REF (Pin 6): Reference Voltage Input. 0V ≤ VREF ≤ VCC.
VOUT (Pin 7): DAC Analog Voltage Output. The output
range is 0V to VREF.
GND (Pin 8): Analog Ground.
VCC (Pin 9): Supply Voltage Input. 2.7V ≤ VCC ≤ 5.5V.
LDAC (Pin 10): Asynchronous DAC Update. A falling edge
on this input after four bytes have been written into the part
immediately updates the DAC register with the contents of
the input register. A low on this input without a complete
32-bit (four bytes including the slave address) data write
transfer to the part does not update the DAC output. Soft-
ware power-down is disabled when LDAC is low.
Exposed Pad (Pin 11): Ground. Must be soldered to PCB
ground.
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