參數(shù)資料
型號(hào)： LTC263ACSC6-LZ12#TRMPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： DAC
英文描述： SERIAL INPUT LOADING, 4.4 us SETTLING TIME, 12-BIT DAC, PDSO6
封裝： LEAD FREE, PLASTIC, MO-203AB, SC-70, 6 PIN
文件頁(yè)數(shù)： 18/20頁(yè)
文件大?。?/td> 341K
代理商： LTC263ACSC6-LZ12#TRMPBF
LTC2630
7
2630f
ELECTRICAL CHARACTERISTICS The ● denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25°C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specied.
LTC2630-HM12/-HM10/-HM8/-HZ12/-HZ10/-HZ8, LTC2630A-HM12/-HZ12 (VFS = 4.096V)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AC Performance
tS
Settling Time
VCC = 5V (Note 7)
±0.39% (±1LSB at 8 Bits)
±0.098% (±1LSB at 10 Bits)
±0.024% (±1LSB at 12 Bits)
3.7
4.4
4.8
μs
Voltage Output Slew Rate
1.0
V/
μs
Capacitive Load Driving
500
pF
Glitch Impulse
At Midscale Transition
2.4
nVs
en
Output Voltage Noise Density
At f = 1kHz, Supply as Reference
At f = 10kHz, Supply as Reference
At f = 1kHz, Internal Reference
At f = 10kHz, Internal Reference
140
130
210
200
nV/√Hz
Output Voltage Noise
0.1Hz to 10Hz, Supply as Reference
0.1Hz to 10Hz, Internal Reference
0.1Hz to 200kHz, Supply as Reference
0.1Hz to 200kHz, Internal Reference
20
650
750
μVP-P
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Linearity and monotonicity are dened from code kL to code 2
N–1,
where N is the resolution and kL is given by kL = 0.016 (2
N/ VFS), rounded
to the nearest whole code. For VFS = 2.5V and N = 12, kL = 26 and linearity
is dened from code 26 to code 4,095. For VFS = 4.096V and
N = 12, kL = 16 and linearity is dened from code 16 to code 4,095.
Note 3: Inferred from measurement at code 16 (LTC2630-12), code 4
(LTC2630-10) or code 1 (LTC2630-8).
Note 4: This IC includes current limiting that is intended to protect the
device during momentary overload conditions. Junction temperature can
exceed the rated maximum during current limiting. Continuous operation
above the specied maximum operating junction temperature may impair
device reliability.
Note 5: Digital inputs at 0V or VCC.
Note 6: Guaranteed by design and not production tested.
Note 7: Internal Reference mode. DAC is stepped 1/4 scale to 3/4 scale
and 3/4 scale to 1/4 scale. Load is 2k
Ω in parallel with 100pF to GND.
Note 8: Temperature coefcient is calculated by dividing the maximum
change in output voltage by the specied temperature range.
TIMING CHARACTERISTICS The ● denotes the specications which apply over the full operating temperature
range, otherwise specications are at TA = 25°C. VCC = 4.5V to 5.5V. (See Figure 1) (Note 6).
LTC2630-HM12/-HM10/-HM8/-HZ12/-HZ10/-HZ8, LTC2630A-HM12/-HZ12 (VFS = 4.096V)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t1
SDI Valid to SCK Setup
●
4ns
t2
SDI Valid to SCK Hold
●
4ns
t3
SCK High Time
●
9ns
t4
SCK Low Time
●
9ns
t5
CS/LD Pulse width
●
10
ns
t6
SCK High to
CS/LD High
●
7ns
t7
CS/LD Low to SCK High
●
7ns
t10
CS/LD High to SCK Positive Edge
●
7ns
SCK Frequency
50% Duty Cycle
●
50
MHz
相關(guān)PDF資料
PDF描述
LTC263AHSC6-HM12#TRPBF SERIAL INPUT LOADING, 4.8 us SETTLING TIME, 12-BIT DAC, PDSO6
LTC263AISC6-LZ12#TRMPBF SERIAL INPUT LOADING, 4.4 us SETTLING TIME, 12-BIT DAC, PDSO6
LTC263AISC6-LZ12#TRPBF SERIAL INPUT LOADING, 4.4 us SETTLING TIME, 12-BIT DAC, PDSO6
LTC263AHSC6-LZ12#TRPBF SERIAL INPUT LOADING, 4.4 us SETTLING TIME, 12-BIT DAC, PDSO6
LTC263ACSC6-HZ12#TRPBF SERIAL INPUT LOADING, 4.8 us SETTLING TIME, 12-BIT DAC, PDSO6
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