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參數(shù)資料
| 型號： | LTC2861IGN#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 3/18頁 |
| 文件大小： | 0K |
| 描述： | IC TXRX RS485 20MBPS 16-SSOP |
| 標準包裝： | 2,500 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | RS485 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 帶卷 (TR) |
LTC2859/LTC2861
11
285961fc
Receiver and Failsafe
With the receiver enabled, when the absolute value of the
differentialvoltagebetweentheAandBpinsisgreaterthan
200mV, the state of RO will reflect the polarity of (A-B).
The LTC2859/LTC2861 have a failsafe feature that guaran-
tees the receiver output to be in a logic HIGH state when
the inputs are either shorted, left open, or terminated
(externally or internally), but not driven for more than
about 3s. The delay prevents signal zero crossings from
being interpreted as shorted inputs and causing RO to go
high inadvertently. This failsafe feature is guaranteed to
work for inputs spanning the entire common mode range
of –7V to +12V.
The receiver output is internally driven high (to VCC) or
low (to ground) with no external pull-up needed. When the
receiver is disabled the RO pin becomes Hi-Z with leakage
of less than ±1A for voltages within the supply range.
Receiver Input Resistance
The receiver input resistance from A or B to ground is
greater than 96k permitting up to a total of 256 receivers
per system without exceeding the RS485 receiver load-
ing specification. High temperature H-Grade operation
reduces the minimum input resistance to 48k permitting
128 receivers on the bus. The input resistance of the
receiver is unaffected by enabling/disabling the receiver
or by powering/unpowering the part. The equivalent input
resistance looking into A and B is shown in Figure 9.
Switchable Termination
Proper cable termination is very important for good signal
fidelity. If the cable is not terminated with its characteristic
impedance, reflections will result in distorted waveforms.
The LTC2859/LTC2861 are the first RS485 transceivers
to offer integrated switchable termination resistors on the
receiver input pins. This provides the tremendous advan-
tage of being able to easily change, through logic control,
the proper line termination for optimal performance when
configuring transceiver networks.
When the TE pin is high, the termination resistor is en-
abled and the differential resistance from A to B is 120.
Figure 10 shows the I/V characteristics between pins A
and B with the termination resistor enabled and disabled.
The resistance is maintained over the entire RS485 com-
mon mode range of –7V to +12V as shown in Figure 11.
Figure 10. Curve Trace Between A and B
with Termination Enabled and Disabled
Figure 9. Equivalent Input Resistance into A and B
(on the LTC2859, Valid if Driver is Disabled)
applicaTions inFormaTion
60
A
TE
B
2859/61 F09
>96k
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