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參數(shù)資料
| 型號(hào)： | LTC3536IMSE#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 4 A SWITCHING REGULATOR, 1440 kHz SWITCHING FREQ-MAX, PDSO12 |
| 封裝： | LEAD FREE, PLASTIC, MSOP-12 |
| 文件頁數(shù)： | 22/28頁 |
| 文件大?。?/td> | 1088K |
| 代理商： | LTC3536IMSE#PBF |
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LTC3536
3
3536f
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3536 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3536E is guaranteed to meet specifications
from 0°C to 125°C junction temperature. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3536I is guaranteed over the full –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors. The junction temperature
(TJ, in °C) is calculated from the ambient temperature (TA, in °C) and
power dissipation (PD, in watts) according to the formula:
TJ = TA + (PD θJA),
where
θJA (in °C/W) is the package thermal impedance.
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 3.3V, VOUT = 3.3V, RT = 100kΩ unless otherwise noted.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 4: Current measurements are performed when the LTC3536 is
not switching. The current limit values measured in operation will be
somewhat higher due to the propagation delay of the comparators.
Note 5: Guaranteed by design characterization and correlation with
statistical process controls.
Note 6: Guaranteed by correlation and design.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Quiescent Current, Active (IVIN)
VFB = 0.7V, VMODE/SYNC = 0V
800
A
Input Current Limit
VMODE/SYNC = 0V (Note 4)
l
2
2.5
A
Peak Current Limit
VMODE/SYNC = 0V (Note 4)
3.4
4
A
Burst Mode Peak Current Limit
VMODE/SYNC = VIN (Note 4)
0.4
0.6
A
Reverse Current Limit
(Note 4)
l
0.3
0.55
A
NMOS Switch Leakage
Switch B, C: SW1 = SW2 = 5.5V, VIN = 5.5V, VOUT = 5.5V
0.1
1
A
PMOS Switch Leakage
Switch A, D: SW1 = SW2 = 0V, VIN = 5.5V, VOUT = 5.5V
0.1
1
A
NMOS Switch On-Resistance
Switch B (From SW1 to GND) (Note 6)
Switch C (From SW2 to GND) (Note 6)
0.11
0.1
Ω
PMOS Switch On-Resistance
Switch A (From VIN to SW1) (Note 6)
Switch D (From VOUT to SW2) (Note 6)
0.12
0.145
Ω
Frequency Accuracy
RT = 100k
l
0.8
1
1.2
MHz
Frequency Accuracy Default
RT = VIN
l
0.96
1.2
1.44
MHz
Internal Soft-Start Time
VFB from 0.06V to 0.54V
0.6
0.9
1.2
ms
Maximum Duty Cycle
Percentage of Period SW2 is Low in Boost Mode
l
88
91
%
Minimum Duty Cycle
Percentage of Period SW1 is High in Buck Mode
l
0
%
Error Amplifier AVOL
90
dB
Error Amplifier Sink Current
250
300
A
Error Amplifier Source Current
400
480
A
MODE/SYNC Input Logic Threshold
Disable Burst Mode Operation
0.3
1
V
MODE/SYNC External Synchronization
SYNC Level High
SYNC Level Low
l
1.2
0.4
V
MODE/SYNC Synchronization Frequency
l
0.3
2
MHz
MODE/SYNC Input Current
VMODE/SYNC = 5.5V = VIN
1
A
SHDN Input Logic Threshold
l
0.3
1
V
SHDN Input Current
VSHDN = 5.5V = VIN
1
A
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