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參數(shù)資料
| 型號： | LTC3541EDD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 368K |
| 描述： | IC REG DL BCK/LINEAR SYNC 10-DFN |
| 產(chǎn)品培訓(xùn)模塊： | More Information on LDOs |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 拓?fù)洌?/td> | 降壓（降壓）同步（1），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開關(guān)： | 2.25MHz |
| 電壓/電流 - 輸出 1： | 0.8 V ~ 5 V，500mA |
| 電壓/電流 - 輸出 2： | 0.4 V ~ 4.1 V，300mA |
| 帶 LED 驅(qū)動器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 0.9 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 10-DFN（3x3） |
| 包裝： | 帶卷 (TR) |
LTC3541
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Table 1. LTC3541 Control Pin Truth Table
PIN NAME
OPERATIONAL DESCRIPTION
ENBUCK ENVLDO MODE
0
0 X LTC3541 Powered Down
0
1 X Buck Powered Down, VLDO Regulator
Powered Down, Linear Regulator
Enabled
1
0 0 Buck Enabled, VLDO Regulator Powered
Down, Linear Regulator Powered Down,
Burst Mode Operation
1
0 1 Buck Enabled, VLDO Regulator Powered
Down, Linear Regulator Powered Down,
Pulse-Skip Mode Operation
1
1 0 Buck Enabled, VLDO Regulator Enabled,
Linear Regulator Powered Down, Burst
Mode Operation
1
1 1 Buck Enabled, VLDO Regulator Enabled,
Linear Regulator Powered Down, Pulse-
Skip Mode Operation
V
IN
(Pin 1): Main Supply Pin. This pin must be closely
decoupled to GND with a 10礔 or greater capacitor.
ENBUCK (Pin 2): Buck Enable Pin. This pin enables the
buck regulator when driven to a logic high.
BUCKFB (Pin 3): Buck Regulator Feedback Pin. This pin
receives the buck regulators feedback voltage from an
external resistive divider.
LFB (Pin 4): VLDO/Linear Regulator Feedback Pin. This
pin receives either the VLDO or linear regulators feedback
voltage from an external resistive divider.
LV
OUT
(Pin 5): VLDO/Linear Regulator Output Pin. This
pin provides the regulated output voltage from the VLDO
or linear regulator.
LV
IN
(Pin 6): VLDO/Linear Regulator Input Supply Pin.
This pin provides the input supply voltage for the VLDO
power FET.
GND (Pin 7): Analog Ground Pin.
MODE (Pin 8): Buck Mode Selection Pin. This pin enables
buck Pulse-Skip operation when driven to a logic high
and enables buck Burst Mode operation when driven to
a logic low.
ENVLDO (Pin 9): VLDO/Linear Regulator Enable Pin.
When driven to a logic high, this pin enables the linear
regulator when the ENBUCK pin is driven to a logic low,
and enables the VLDO when the ENBUCK pin is driven to
a logic high.
SW (Pin 10): Switch Node Pin. This pin connects the
internal main and synchronous power MOSFET switches
to the external inductor for the buck regulator.
Exposed Pad (Pin 11): Ground Pin. This pin must be
soldered to the PCB to provide both electrical contact to
ground and good thermal contact to the PCB.
Note: Table 1 details the truth table for the control pins
of the LTC3541.
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| LTC3542-1 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:500mA, 2.25MHz 2.8V Output Synchronous Step-Down DC/DC Converter |
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| LTC3542EDC#TRMPBF | 功能描述:IC REG BUCK SYNC ADJ 0.5A 6DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關(guān)穩(wěn)壓器 系列:- 產(chǎn)品培訓(xùn)模塊:High Efficiency Current Mode Switching Regulators CMOS LDO Regulators 特色產(chǎn)品:BD91x Series Step-Down Regulators 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:降壓（降壓） 輸出類型:兩者兼有 輸出數(shù):2 輸出電壓:3.3V，0.8 V ~ 2.5 V 輸入電壓:4.5 V ~ 5.5 V PWM 型:電流模式 頻率 - 開關(guān):1MHz 電流 - 輸出:1.5A 同步整流器:是 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:VQFN020V4040 產(chǎn)品目錄頁面:1373 (CN2011-ZH PDF) 其它名稱:BD9152MUV-E2TR |
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