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參數(shù)資料
| 型號： | LTC3604EMSE#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, PDSO16 |
| 封裝： | LEAD FREE, PLASTIC, MSOP-16 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 277K |
| 代理商： | LTC3604EMSE#PBF |
LTC3604
13
3604f
APPLICATIONS INFORMATION
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3604 can turn on the bottom power MOSFET, trip
the current comparator and turn the power MOSFET back
off. This time is typically 40ns. For the controlled on-time
current mode control architecture, the minimum off-time
limit imposes a maximum duty cycle of:
DC
f t
MAX
OFF MIN
()
(
)
–
=
()
1
where f is the switching frequency and tOFF(MIN) is the
minimum off-time. If the maximum duty cycle is surpassed,
due to a dropping input voltage for example, the output
will drop out of regulation. The minimum input voltage to
avoid this dropout condition is:
V
ft
IN MIN
OUT
OFF MIN
()
=
()
1
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 20ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DC
f t
MIN
ON MIN
()
=
()
where tON(MIN) is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
In the rare cases where the minimum duty cycle is
surpassed, the output voltage will still remain in regula-
tion, but the switching frequency will decrease from its
programmed value. This is an acceptable result in many
applications, so this constraint may not be of critical
importance in most cases, and high switching frequen-
cies may be used in the design without any fear of severe
consequences. As the sections on Inductor and Capacitor
Selection show, high switching frequencies allow the use
of smaller board components, thus reducing the footprint
of the application circuit.
Internal/External Loop Compensation
The LTC3604 provides the option to use a xed internal
loop compensation network to reduce both the required
external component count and design time. The internal
loop compensation network can be selected by connecting
the ITH pin to the INTVCCpin.Toensurestability,itisrecom-
mended that the output capacitance be at least 47μF when
using internal compensation. Alternatively, the user may
choose specic external loop compensation components
to optimize the main control loop transient response as
desired. External loop compensation is chosen by simply
connecting the desired network to the ITH pin.
Suggested compensation component values are shown in
Figure 3. For a 2MHz application, an R-C network of 150pF
and 14kΩ provides a good starting point. The bandwidth
of the loop increases with decreasing C. If R is increased
by the same factor that C is decreased, the zero frequency
will be kept the same, thereby keeping the phase the same
in the most critical frequency range of the feedback loop.
A 10pF bypass capacitor on the ITH pin is recommended
for the purposes of ltering out high frequency coupling
from stray board capacitance. In addition, a feedforward
capacitor CF can be added to improve the high frequency
response, as previously shown in Figure 2. Capacitor CF
provides phase lead by creating a high frequency zero
with R1 which improves the phase margin.
Figure 3. Compensation Components
ITH
RCOMP
14k
CCOMP
150pF
CBYP
3604 F03
SGND
LTC3604
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