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參數(shù)資料
| 型號： | LTC3828EUH |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Model HB Series Horizontal Stacking Banana Plug Patch Cord, Banana Plug Each End Operating Voltage 30VAC/60VDC Max, Current-15A Cont, Operating Temp Max +55 degrees C, Color-Red, Length-24" RoHS Compliant: Yes |
| 中文描述： | 3 A DUAL SWITCHING CONTROLLER, 590 kHz SWITCHING FREQ-MAX, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, MO-220WHHD, QFN-32 |
| 文件頁數(shù)： | 19/32頁 |
| 文件大?。?/td> | 396K |
| 代理商： | LTC3828EUH |
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LTC3828
3828f
19
APPLICATIOU
recommended. Good bypassing is necessary to supply
the high transient currents required by the MOSFET gate
drivers and to prevent interaction between channels.
Higher input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the IC to be ex-
ceeded. The system supply current is normally dominated
by the gate charge current. Additional external loading of
the INTV
CC
also needs to be taken into account for the
power dissipation calculations.
The absolute maximum rating for the INTV
CC
Pin is 50mA.
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked
operating in continuous mode at maximum V
IN
.
W
U
U
V
V
R
R
OUT
=
+
0 8
.
1
2
1
where R1 and R2 are defined in Figure 1.
SENSE
+
/SENSE
–
Pins
The common mode input range of the current comparator
sense pins is from 0V to (1.1)INTV
CC
. Continuous linear
operation is guaranteed throughout this range allowing
output voltage setting from 0.8V to 7.7V. A differential
NPN input stage is biased with internal resistors from an
internal 2.4V source as shown in the Functional Diagram.
This requires that current either be sourced or sunk from
the SENSE pins depending on the output voltage. If the
output voltage is below 2.4V current will flow out of both
SENSE pins to the main output. The output can be easily
preloaded by the V
OUT
resistive divider to compensate for
the current comparator’s negative input bias current. The
maximum current flowing out of each pair of SENSE pins
is:
I
SENSE+
+ I
SENSE–
= (2.4V – V
OUT
)/24k
Since V
OSENSE
is servoed to the 0.8V reference voltage, we
can choose R1 in Figure 1 to have a maximum value to
absorb this current.
R
k
V
V V
–
MAX
(
OUT
1
24
0 8
.
2 4
.
)
=
for V
OUT
< 2.4V
Regulating an output voltage of 1.8V, the maximum value
of R1 should be 32k. Note that for an output voltage above
2.4V, R1 has no maximum value necessary to absorb the
sense currents; however, R1 is still bounded by the
V
OSENSE
feedback current.
RUN and Soft-Start
The LTC3828 RUN pins shut down their respective chan-
nels independently. The LTC3828 is put in a low quiescent
current state (I
Q
< 30uA) if both RUN pin voltages are
below 1V. TRCKSS pins are actively pulled to ground in
this shutdown state. Once the RUN pin voltages are above
1.5V, the respective channel of the LTC3828 is powered
Topside MOSFET Driver Supply (C
B
, D
B
)
External bootstrap capacitors C
B
connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor C
B
in the functional diagram is charged though
external diode D
B
from INTV
CC
when the SW pin is low.
When one of the topside MOSFETs is to be turned on, the
driver places the C
B
voltage across the gate-source of the
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
V
IN
and the BOOST pin follows. With the topside MOSFET
on, the boost voltage is above the input supply: V
BOOST
=
V
IN
+ V
INTVCC
. The value of the boost capacitor C
B
needs
to be 100 times that of the total input capacitance of the
topside MOSFET(s). The reverse breakdown of the exter-
nal Schottky diode must be greater than V
IN(MAX)
. When
adjusting the gate drive level, the final arbiter is the total
input current for the regulator. If a change is made and the
input current decreases, then the efficiency has improved.
If there is no change in input current, then there is no
change in efficiency.
Output Voltage
The output voltages are each set by an external feedback
resistive divider carefully placed across the output capaci-
tor. The resultant feedback signal is compared with the
internal precision 0.800V voltage reference by the error
amplifier. The output voltage is given by the equation:
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