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LTC4052-4.2
6
405242i
CHRG Status Output Pin
This open-drain output can report three different charger
conditions:
Charger Status
Not Charging
Charging
Charging,
C
/10 Reached
CHRG Pin Behavior
High Impedance
Strong Pulldown
Weak 40
μ
A Pulldown
full charge. When the duty cycle falls below 10%, the
comparator trips and turns off the N-MOSFET at the CHRG
pin and switches in a weak (40
μ
A) current source to
ground. The 40
μ
A turns off when the charge cycle termi-
nates.
C
/10 detection is disabled in trickle charge mode.
Internal Pass Transistor
An N-channel MOSFET (0.35
) is included in the LTC4052
as the pass transistor. The gate of the MOSFET is
controlled by an internal charge pump. The body is
connected to ground instead of source terminal. There is
no body diode from the BAT pin back to the V
IN
pin;
therefore, no blocking diode is required in series with the
battery or the input supply. This will not only reduce cost
but also reduce the heat generated while in fast charge
mode. An internal thermal shutdown circuit turns the pass
transistor off when the die temperature exceeds approxi-
mately 140
°
C with 5
°
C of thermal hysteresis.
Gate Drive
The MOSFET gate drive consists of a regulated 10
μ
A
current source charge pump. A series RC network is
required from the GATE pin to the V
IN
pin. When the
MOSFET is turned on, the voltage at the V
IN
pin will start
slewing down to a voltage equal to V
BAT
plus the voltage
drop across the pass transistor and R
SENSE
. The slew rate
is equal to 10
μ
A/C. By ramping the V
IN
pin down slowly,
the inrush current is reduced. The resistor in series with
the capacitor is required to limit the transient current when
the input supply is first applied.
When the charge pump is turned off, a 50
μ
A current
source to ground will start pulling the GATE voltage down.
Once the pass transistor is off, the voltage at the V
IN
pin
will begin slewing up with the rate equal to 50
μ
A/C. With
this external capacitor, the voltage at the V
IN
pin is ramping
at a controlled manner (Figure 2).
For higher current applications an external power
N-channel MOSFET can be connected in parallel with the
internal pass transistor. Because the charge pump output is
clamped to 12V above GND, the external MOSFET gate to
source breakdown voltage should be rated for 16V or more.
APPLICATIU
W
U
U
CHRG
4052 F01
V
IN
V
IN
LTC4052
V
DD
2k
620k
6
3
OUT
IN
MICROPROCESSOR
Figure 1. Interfacing with Microprocessor
Using a simple two-resistor network a microprocessor
can distinguish all three states. See Figure 1.
When the LTC4052 is charging a battery, an internal N-
MOSFET pulls the CHRG pin to ground. When
C
/10 is
reached, the strong NMOS pulldown is replaced by a weak
40
μ
A current source pulldown. When the LTC4052 is not
charging a battery, the CHRG pin is high impedance.
Using the network in Figure 1, the microprocessor can
determine charger state using the following procedure:
1. Force the digital output pin, OUT, high and read the logic
value at the digital input, IN. If IN reads low, a charger cycle
is in progress.
2. If the IN pin is high, force the OUT pin to be high
impedance, then read the logic level at the IN pin again. If
IN is low, the charge cycle is still in progress, the timer is
still running, but the charge current has dropped below
10% of the programmed value indicating that the charge
cycle is nearly complete.
3. If the logic level at the IN pin is high, the charge cycle has
ended.
Near End-of-Charge C/10 Detection
The LTC4052 includes a comparator to monitor the duty
cycle at the GATE pin to detect when the battery is nearing