參數(shù)資料
型號(hào): LTC4216IDE
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: Ultralow Voltage Hot Swap Controller
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO12
封裝: 4 X 3 MM, PLASTIC, DFN-12
文件頁數(shù): 12/24頁
文件大?。?/td> 277K
代理商: LTC4216IDE
LTC4216
4216f
12
Forexample if C
nFdV
,
10
dt
V msand
/
1
dV
dt
V ms
/
SS NOM
(
SS SLOW
(
,
.
.
)
)
2
0 1
=
=
=
After the initial timing cycle, the SS capacitor is charged
by a 10μA current source pull-up and GATE is held low
by the ACL amplifier. As SS ramps up, the ACL amplifier
releases the GATE when it crosses its input offset volt-
age. At this instant, SS switches the pull-up current from
10μA to 1μA for a slower ramp rate. GATE continues to
charge up with 20μA pull-up before the MOSFET reaches
its turn-on threshold voltage. When the external MOSFET
is first turned on, there is always a current step due to the
high gain of the MOSFET. The slower SS ramp rate allows
the gate of the external MOSFET to be turned on with a
smaller inrush current step.
When the external MOSFET is turned on, load current starts
to flow through the sense resistor, developing a voltage drop
across it. This allows the ACL amplifier to servo the GATE
to the voltage across the sense resistor, thus controlling
the rate of change of the inrush current. At this instant, SS
switches back from 1μA to 10μA current source pull-up
for a normal ramp rate. GATE continues to ramp up as
the ACL amplifier servos to track the SS ramp rate. At the
end of SS ramp-up when SS reaches its final value, GATE
is servoed to
Δ
V
ACL(TH)
across the sense resistor. If the
voltage across the sense resistor drops below
Δ
V
ACL(TH)
due to a falling load current, the ACL amplifier shuts off
and GATE ramps further by a 20μA pull-up.
SS is pulled low under any of the following conditions:
in V
CC
undervoltage lockout condition, during the first
timing cycle or when the circuit breaker fault times out.
If the soft-start function is not used, leave the SS pin
unconnected.
Inrush Control with GATE Capacitor
For applications not requiring soft-start to control the
di/dt of the inrush current during power-up, an alternative
way to limit the inrush is to control the GATE pin voltage
slew rate by connecting an external capacitor, C4, from
the GATE pin to ground, as shown in Figure 7. The GATE
slew rate is given by:
where C
GATE
is the associated parasitic GATE capacitance
due to the external MOSFET’s gate input capacitance,
C
ISS
.
The inrush current flowing into the load capacitor, C
LOAD
,
is limited to:
dV
dt
A
C
C
GATE
GATE
=
μ
+
20
4
(7)
For example, if C
LOAD
= 4700μF, C4 = 33nF and C
GATE
=
5nF, I
INRUSH
= 2.5A.
If C
LOAD
is very large and I
INRUSH
exceeds the analog
current limit, the GATE is servoed to control the inrush
current to
Δ
V
ACL(TH)
/R
SENSE
.
One limitation with this technique is that it slows down
the system turn-on and turn-off time by adding a capaci-
tor at the GATE pin. Should this technique be used, C4 ≤
50nF is recommended. However, having an external gate
capacitor helps to eliminate voltage spikes coupled through
the MOSFET’s drain-to-gate capacitance to the GATE pin
when the supply power is first applied.
I
C
dV
dt
C
C
C
A
INRUSH
LOAD
GATE
LOAD
+
GATE
=
=
μ
4
20
(8)
Figure 7. Inrush Control with External Gate Capacitor
SENSEP SENSEN GATE
FB
C4
**ADDITIONAL DETAILS
OMITTED FOR CLARITY
LTC4216**
R4
R3
R
SENSE
V
IN
V
OUT
M1
+
C
LOAD
4216 F07
APPLICATIU
W
U
U
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