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參數(shù)資料
| 型號(hào)： | LTC4441 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | N-Channel MOSFET Gate Driver |
| 中文描述： | N溝道MOSFET柵極驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 154K |
| 代理商： | LTC4441 |
LTC4441/LTC4441-1
44411f
8
APPLICATIU
W
U
U
stability; the value of R2 can be varied to achieve the
required DRV
CC
voltage:
R
k
–1 21
DRV
V
CC
2
406
=
The DRV
CC
regulator can supply up to 100mA and is short-
circuit protected. The output must be bypassed to the
PGND pin in very close proximity to the IC pins with a
minimum of 10
μ
F ceramic, low ESR (X5R or X7R) capaci-
tor. Good bypassing is necessary as high transient supply
currents are required by the driver. If the input supply
voltage, V
IN
,
is close to the required gate drive voltage, this
regulator can be disabled by connecting the DRV
CC
and FB
pins to V
IN
.
The LTC4441/LTC4441-1 monitors the FB pin for DRV
CC
’s
UVLO condition (UVLO in Figure 1). During power-up, the
driver output is held low until the DRV
CC
voltage reaches
90% of the programmed value. Thereafter, if the DRV
CC
voltage drops more than 20% below the programmed
value, the driver output is forced low.
Logic Input Stage
The LTC4441/LTC4441-1 driver employs TTL/CMOS com-
patible input thresholds that allow a low voltage digital
1.09V
OUT
C
VCC
4441 F01
1.21V
UVLO
DRIVER
ENABLE
DRIVER
M
REG
FB
R2
R1
330k
–
+
V
IN
DRV
CC
PGND
REG
LTC4441
Figure 1. DRV
CC
Regulator
signal to drive standard power MOSFETs. The LTC4441/
LTC4441-1 contains an internal voltage regulator that
biases the input buffer, allowing the input thresholds (V
IH
= 2.4V, V
IL
= 1.4V) to be independent of the programmed
driver supply, DRV
CC
, or the input supply, V
IN
. The 1V
hysteresis between V
IH
and V
IL
eliminates false triggering
due to noise during switching transitions. However, care
should be taken to isolate this pin from any noise pickup,
especially in high frequency, high voltage applications.
The LTC4441/LTC4441-1 input buffer has high input
impedance and draws negligible input current, simplifying
the drive circuitry required for the input. This input can
withstand voltages up to 15V above and below ground.
This makes the chip more tolerant to ringing on the input
digital signal caused by parasitic inductance.
Driver Output Stage
A simplified version of the LTC4441/LTC4441-1’s driver
output stage is shown in Figure 2.
Q1
P1
DRV
CC
N1
N3
DRV
CC
LTC4441
PGND
OUT
C
GD
V
IN
POWER
MOSFET
4441 F02
LOAD
INDUCTOR
C
GS
N2
R
O
Figure 2. Driver Output Stage
The pull-up device is the combination of an NPN transis-
tor, Q1, and a P-channel MOSFET, P1. This provides both
the ability to swing to rail (DRV
CC
) and deliver large peak
charging currents.
The pull-down device is an N-channel MOSFET, N1, with
a typical on resistance of 0.35
. The low impedance of N1
provides fast turn-off of the external power MOSFET and
holds the power MOSFET’s gate low when its drain voltage
switches. When the power MOSFET’s gate is pulled low
(gate shorted to source through N1) by the LTC4441/
LTC4441-1, its drain voltage is pulled high by its load (e.g.,
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