VREG 0.1μF –INS 6102 F11
參數(shù)資料
型號: LTC6102CDD-1#PBF
廠商: Linear Technology
文件頁數(shù): 13/26頁
文件大?。?/td> 0K
描述: IC AMP CURRENT SENSE 8-DFN
標準包裝: 121
放大器類型: 電流檢測
電路數(shù): 1
增益帶寬積: 200kHz
電流 - 輸入偏壓: 60pA
電壓 - 輸入偏移: 3µV
電流 - 電源: 420µA
電流 - 輸出 / 通道: 1mA
電壓 - 電源,單路/雙路(±): 4 V ~ 60 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-WFDFN 裸露焊盤
供應商設備封裝: 8-DFN-EP(3x3)
包裝: 管件
產(chǎn)品目錄頁面: 1322 (CN2011-ZH PDF)
LTC6102
LTC6102-1/LTC6102HV
20
6102fd
APPLICATIONS INFORMATION
–INF
VREG
0.1μF
–INS
6102 F11
RIN
+ = RINRSENSE
LTC6102-1
ROUT
VOUT
V+
LOAD
RBIAS
2.7M
RSENSE
V+
V
OUT
+IN
EN
RIN
RIN
+
+
Figure 11
Figure 12. LTC6102-1 VREG Voltage During
Bypass Capacitor Discharge when Disabled
pin. Figure 11 shows the LTC6102-1 with a 2.7M pull-up
resistor to limit the current to less than 20μA with a 60V
supply, which is enough to satisfy the input bias current
requirement.
Start-Up Current
The start-up current of the LTC6102 when the part is
powered on or enabled (LTC6102-1) consists of three
parts: the rst is the current necessary to charge the
VREG bypass capacitor, which is nominally 0.1μF. Since the
VREG voltage charges to approximately 4.5V below the V+
voltage, this can require a signicant amount of start-up
current. The second source is the active supply current of
the LTC6102 amplier, which is not signicantly greater
during start-up than during normal operation. The third
source is the output current of the LTC6102, which upon
start-up may temporarily drive the output high. This could
cause milliamps of output current (limited mostly by the
input resistor RIN) to ow into the output resistor and/or
the output limiting ESD structure in the LTC6102. This is
a temporary condition which will cease when the LTC6102
amplier settles into normal closed-loop operation.
When the LTC6102-1 is disabled, the internal amplier is
also shut down, which means that the discharge rate of
the 0.1μF capacitor is very low. This is signicant when the
LTC6102-1 is disabled to save power, because the recharg-
ing of the 0.1μF capacitor is a signicant portion of the
overall power consumed in startup. Figure 12 shows the
discharge rate of the 0.1μF capacitor after the LTC6102-1
is shut down at room temperature.
In a system where the LTC6102-1 is disabled for short
periods, the start-up power (and therefore the average
power) can be reduced since the VREG bypass capacitor
is never signicantly discharged. The time required to
charge the VREG capacitor will also be reduced, allowing
the LTC6102-1 to start-up more quickly.
TIME (ms)
–2
0
ENABLE
VOL
TAGE
(V)
V
REG
VOL
TAGE
(V)
0.25
0.75
1.00
1.25
10
2.25
6102 F12
0.50
4
0
12
6
2
14
816
1.50
1.75
2.00
7.4
7.5
7.7
7.8
7.9
8.3
7.6
8.0
8.1
8.2
VREG
EN
TA = 25°C
V+ = 12V
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