參數(shù)資料
型號(hào): LTC6103IMS8#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 2/16頁(yè)
文件大小: 0K
描述: IC AMP CURRENT SENSE 8-MSOP
標(biāo)準(zhǔn)包裝: 50
放大器類(lèi)型: 電流檢測(cè)
電路數(shù): 2
增益帶寬積: 140kHz
電流 - 輸入偏壓: 100nA
電壓 - 輸入偏移: 85µV
電流 - 電源: 390µA
電流 - 輸出 / 通道: 1mA
電壓 - 電源,單路/雙路(±): 4 V ~ 60 V,±2 V ~ 30 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1322 (CN2011-ZH PDF)
LTC6103
10
6103f
Error Sources
The current sense system uses an amplier and resistors
to apply gain and level shift the result. The output is then
dependent on the characteristics of the amplier, such as
bias current and input offset, as well as resistor matching.
Ideally, the circuit output is:
VV
R
VR
I
OUT
SENSE
OUT
IN
SENSE
=
In this case, the only error is due to resistor mismatch,
which provides an error in gain only. However, offset
voltage, bias current and nite gain in the amplier cause
additional errors.
Output Error, EOUT, Due to the Amplier DC Offset
Voltage, VOS
EV
R
OUT VOS
OS
OUT
IN
()
=
The DC offset voltage of the amplier adds directly to the
value of the sense voltage, VSENSE. This is the dominant
error of the system and it limits the available dynamic
range. The paragraph, Selection of External Current Sense
Resistor provides details.
Output Error, EOUT, Due to Bias Currents
The bias current IB(+) ows into the positive input of the
internal op amp. IB(–) ows into the negative input.
EOUT(IBIAS) = ROUT(IB(+) (RSENSE/RIN) – IB(–))
Since IB(+) ≈ IB(–) = IBIAS, if RSENSE << RIN then:
EOUT(IBIAS) ≈ –ROUT IBIAS
For instance, if IBIAS is 100nA and ROUT is 1k, then the
output error is 0.1mV.
Output Error, EOUT, Due to PCB Trace Resistance
The LTC6103 uses the +IN pin for both the positive amplier
input and the positive supply input for the amplier. The
supply current can cause an output error if trace resistance
between RSENSE and +IN is signicant (Figure 4).
EOUT(RT_+IN) = (IS RT/RIN) ROUT
Trace resistance to the –IN pin will increase the effective
RIN value, causing a gain error. In addition, internal device
resistance will add approximately 0.3
Ω to RIN.
Minimizing the trace resistance is important and care
should be taken in the PCB layout. Make the trace short
and wide. Kelvin connection to the shunt resistor pad
should be used.
APPLICATIONS INFORMATION
Figure 4. Error Due to PCB Trace Resistance
+
+IN
OUT
VS
IS
1/2
LTC6103
–IN
RIN
RT
RSENSE
V+
V
ROUT
6103 F04
LOAD
ILOAD
Output Error, EOUT, Due to the Finite DC Open-Loop Gain,
AOL, of the LTC6103 Amplier
This error is inconsequential as the AOL of the LTC6103
is very large.
Design Example:
If ISENSE range = (1A to 1mA) and:
V
I
V
A
OUT
SENSE
=
3
1
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