參數(shù)資料
型號: LTC6248IMS#TRPBF
廠商: Linear Technology
文件頁數(shù): 7/24頁
文件大小: 0K
描述: IC OPAMP RRIO 180MHZ QUAD 16MSOP
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 通用
電路數(shù): 4
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 90 V/µs
增益帶寬積: 180MHz
-3db帶寬: 120MHz
電流 - 輸入偏壓: 400nA
電壓 - 輸入偏移: 100µV
電流 - 電源: 1.25mA
電流 - 輸出 / 通道: 100mA
電壓 - 電源,單路/雙路(±): 2.5 V ~ 5.25 V,±1.25 V ~ 2.625 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TFSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 16-MSOP
包裝: 帶卷 (TR)
LTC6246/LTC6247/LTC6248
624678fa
applicaTions inForMaTion
Figure 2. 5pF Feedback Cancels Parasitic Pole
Feedback Components
When feedback resistors are used to set up gain, care
must be taken to ensure that the pole formed by the
feedback resistors and the parasitic capacitance at the
inverting input does not degrade stability. For example if
the amplifier is set up in a gain of +2 configuration with
gain and feedback resistors of 5k, a parasitic capacitance
of 5pF (device + PC board) at the amplifier’s inverting
input will cause the part to oscillate, due to a pole formed
at 12.7MHz. An additional capacitor of 5pF across the
feedback resistor as shown in Figure 2 will eliminate any
ringing or oscillation. In general, if the resistive feedback
network results in a pole whose frequency lies within the
closed loop bandwidth of the amplifier, a capacitor can be
added in parallel with the feedback resistor to introduce
a zero whose frequency is close to the frequency of the
pole, improving stability.
624678 F02
CPAR
5k
+
VOUT
VIN
5k
5pF
Power Dissipation
The LTC6246 and LTC6247 contain one and two amplifiers
respectively. Hence the maximum on-chip power dis-
sipation for them will be less than the maximum on-chip
power dissipation for the LTC6248, which contains four
amplifiers.
The LTC6248 is housed in a small 16-lead MS package and
typically has a thermal resistance (
θJA) of 125°C/ W. It is
necessary to ensure that the die’s junction temperature
does not exceed 150°C. The junction temperature, TJ, is
calculated from the ambient temperature, TA, power dis-
sipation, PD, and thermal resistance,
θJA:
TJ = TA + (PD θJA)
The power dissipation in the IC is a function of the supply
voltage, output voltage and load resistance. For a given
supply voltage with output connected to ground or supply,
the worst-case power dissipation PD(MAX) occurs when
the supply current is maximum and the output voltage at
half of either supply voltage for a given load resistance.
PD(MAX) is approximately (since IS actually changes with
output load current) given by:
PD(MAX) =(VS IS(MAX))+
VS
2
2
/ RL
Example:ForanLTC6248ina16-leadMSpackageoperating
on ±2.5V supplies and driving a 100Ω load to ground, the
worst-case power dissipation is approximately given by
PD(MAX)/Amp = (5 1.3mA) + (1.25)2/100 = 22mW
If all four amplifiers are loaded simultaneously then the
total power dissipation is 88mW.
AttheAbsoluteMaximumambientoperatingtemperature,
the junction temperature under these conditions will be:
TJ = TA + PD 125°C/W
= 125 + (0.088W 125°C/W) = 136°C
which is less than the absolute maximum junction tem-
perature for the LTC6248 (150°C).
Refer to the Pin Configuration section for thermal resis-
tances of various packages.
Shutdown
The LTC6246 and LTC6247MS have SHDN pins that can
shut down the amplifier to 42A typical supply current.
The SHDN pin needs to be taken below 0.8V above the
negative supply for the amplifier to shut down. When left
floating, the SHDN pin is internally pulled up to the positive
supply and the amplifier remains on.
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