參數資料
| 型號： | LTC6404CUD-2#PBF |
| 廠商： | Linear Technology |
| 文件頁數： | 26/28頁 |
| 文件大小： | 0K |
| 描述： | IC AMP/DRIVER DIFF 16-QFN |
| 標準包裝： | 121 |
| 類型： | ADC 驅動器 |
| 應用： | 數據采集 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 管件 |
| 產品目錄頁面： | 1323 (CN2011-ZH PDF) |
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LTC6404
7
6404f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs IN+, IN– are protected by a pair of back-to-back diodes.
If the differential input voltage exceeds 1.4V, the input current should be
limited to less than 10mA. Input pins (IN+, IN–, VOCM and SHDN) are also
protected by steering diodes to either supply. If the inputs should exceed
either supply voltage, the input current should be limited to less than
10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indenitely. Long-term application of output currents in excess of the
absolute maximum ratings may impair the life of the device.
Note 4: The LTC6404C/LTC6404I are guaranteed functional over the
operating temperature range –40°C to 85°C. The LTC6404H is guaranteed
functional over the operating temperature range –40°C to 125°C.
Note 5: The LTC6404C is guaranteed to meet specied performance from
0°C to 70°C. The LTC6404C is designed, characterized, and expected
to meet specied performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6404I is guaranteed to meet
specied performance from –40°C to 85°C. The LTC6404H is guaranteed
to meet specied performance from –40°C to 125°C.
Note 6: Input bias current is dened as the average of the input currents
owing into Pin 6 and Pin 15 (IN– and IN+). Input offset current is dened
as the difference of the input currents owing into Pin 15 and Pin 6
(IOS = IB+ – IB–)
Note 7: Input common mode range is tested using the test circuit of
Figure 1 by measuring the differential gain with a ±1V differential output
with VICM = mid-supply, and with VICM at the input common mode range
limits listed in the Electrical Characteristics table, verifying the differential
gain has not deviated from the mid-supply common mode input case
by more than 1%, and the common mode offset (VOSCM) has not
deviated from the zero bias common mode offset by more than ±15mV
(LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4).
The voltage range for the output common mode range is tested using the
test circuit of Figure 1 by applying a voltage on the VOCM pin and testing at
both mid-supply and at the Electrical Characteristics table limits to verify
that the the common mode offset (VOSCM) has not deviated by more than
±15mV (LTC6404-1), ±20mV (LTC6404-2) or ±40mV (LTC6404-4).
Note 8: Input CMRR is dened as the ratio of the change in the input
common mode voltage at the pins IN+ or IN– to the change in differential
input referred voltage offset. Output CMRR is dened as the ratio of the
change in the voltage at the VOCM pin to the change in differential input
referred voltage offset. These specications are strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs, and is difcult to measure actual amplier performance. (See “The
Effects of Resistor Pair Mismatch” in the Applications Information section
of this data sheet. For a better indicator of actual amplier performance
independent of feedback component matching, refer to the PSRR
specication.
Note 9: Differential power supply rejection (PSRR) is dened as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common mode power supply rejection (PSRRCM) is
dened as the ratio of the change in supply voltage to the change in the
common mode offset, VOUTCM – VOCM.
Note 10: This parameter is pulse tested. Output swings are measured as
differences between the output and the respective power supply rail.
Note 11: This parameter is pulse tested. Extended operation with the
output shorted may cause junction temperatures to exceed the 125°C limit
and is not recommended. See Note 3 for more details.
Note 12: Since the LTC6404 is a voltage feedback amplier with low
output impedance, a resistive load is not required when driving an ADC.
Therefore, typical output power is very small. In order to compare the
LTC6404 with ampliers that require 50
Ω output loads, output swing of
the LTC6404 driving an ADC is converted into an “effective” OIP3 as if the
LTC6404 were driving a 50Ω load.
Note 13: The capacitors used to set the lter pole might have up to ±15%
variation. The resistors used to set the lter pole might have up to ±12%
variation.
ELECTRICAL CHARACTERISTICS
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相關代理商/技術參數 |
參數描述 |
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| LTC6404CUD-2-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:600MHz, Low Noise, High Precision Fully Differential Input/Output Amplifi er/Driver |
| LTC6404CUD-4#PBF | 功能描述:IC AMP/DRIVER DIFF 16-QFN RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應商設備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| LTC6404CUD-4#TRPBF | 功能描述:IC AMP/DRIVER DIFF 16-QFN RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應商設備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| LTC6404CUD-4-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:600MHz, Low Noise, High Precision Fully Differential Input/Output Amplifi er/Driver |
| LTC6404CUD-4-TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:600MHz, Low Noise, High Precision Fully Differential Input/Output Amplifi er/Driver |
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