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參數(shù)資料
| 型號： | LTC6410IUD-6#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP DIFF IF 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 121 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 1500 V/µs |
| -3db帶寬： | 1.4GHz |
| 電壓 - 輸入偏移： | 400µV |
| 電流 - 電源： | 125mA |
| 電流 - 輸出 / 通道： | 42mA |
| 電壓 - 電源，單路/雙路(±)： | 2.8 V ~ 5.5 V，±1.4 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1323 (CN2011-ZH PDF) |
LTC6410-6
4
64106fa
The
l denotes the specications which apply over the full
operating temperature range, otherwise specications are at TA = 25°C. V+ = 5V, V– = 0V, SHDN = 3V, +IN is shorted to +TERM, –IN is
shorted to –TERM, VINCM = VBIAS = 2.5V, +IN = –IN = 2.5V, input source resistance (RS) is 25Ω on each input (50Ω differential), RL =
50Ω from +OUT to –OUT, unless otherwise noted. VBIAS is dened as the voltage on theVBIAS pin. VOUTCM is dened as (+OUT + –OUT)/2.
VINCM is dened as (+IN + –IN)/2. VINDIFF is dened as (+IN – –IN). VOUTDIFF is dened as (+OUT – –OUT). See DC test circuit schematic.
5V DC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
GDIFF
Differential Gain (Low Frequency S21)
VIN = ±0.2V
l
5
4.7
6.1
6.7
7.0
dB
VSWINGDIFF
Differential Output Voltage Swing
VOUTDIFF, VIN = ±4V
l
4.1
3.5
4.8
VP-P
VSWINGMIN
Output Swing Low
Single-Ended +OUT, –OUT, VIN = ±4V
l
1.1
1.4
1.6
V
VSWINGMAX
Output Swing High
Single-Ended +OUT, –OUT, VIN = ±4V
l
3.2
3.0
3.5
V
IS
Supply Current
l
125
150
160
mA
SHDN Pin
VIL
SHDN Input Low Voltage
l
1.8
2.0
V
VIH
SHDN Input High Voltage
l
2.8
3
V
IIL
SHDN Input Low Current
SHDN = 1.8V
l
–300
–110
0
μA
IIH
SHDN Input High Current
SHDN = 3V
l
–200
–60
0
μA
AC ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25°C. V+ = 3V, V– = 0V, SHDN = 2V, +IN is shorted to +TERM, –IN is shorted to
–TERM, VINCM = VBIAS = 1.5V, input source resistance (RS) is 25Ω on each input (50Ω differential), RL = 50Ω from +OUT to –OUT, +IN
and –IN are AC-coupled, unless otherwise noted. VBIAS is dened as the voltage on theVBIAS pin. VOUTCM is dened as
(+OUT + –OUT)/2. VINCM is dened as (+IN + –IN)/2. VINDIFF is dened as (+IN – –IN). VOUTDIFF is dened as (+OUT – –OUT).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
–3dBBW
–3dB Bandwidth
VINDIFF = –10dBm
1
1.4
GHz
0.1dBBW
Bandwidth for 0.1dB Flatness
VINDIFF = –10dBm
150
MHz
0.5dBBW
Bandwidth for 0.5dB Flatness
VINDIFF = –10dBm
300
MHz
SR
Slew Rate
1.5
V/ns
ts
1% Settling Time
1% Settling for a 1VP-P VOUTDIFF Step
3
ns
tON
Turn-On Time
SHDN = 0V to 3V, +OUT and –OUT Within 10% of Final Values
30
ns
tOFF
Turn-Off Time
SHDN = 3V to 0V, +OUT and –OUT Within 10% of Final Values
30
ns
Common Mode Voltage Control (VBIAS Pin)
–3dBBWCM Common Mode Small-Signal
–3dB Bandwidth
0.2VP-P at VBIAS, Measured VOUTCM
1
GHz
SRCM
Common Mode Slew Rate
100
V/μs
Noise/Harmonic Performance Input/Output Characteristics
10MHz Signal
HD2
Second Harmonic Distortion
VOUTDIFF = 0dBm
–85
dBc
HD3
Third Harmonic Distortion
VOUTDIFF = 0dBm
–71
dBc
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